From owner-svn-soc-all@FreeBSD.ORG Sat Jun 30 12:25:18 2012 Return-Path: Delivered-To: svn-soc-all@FreeBSD.org Received: from socsvn.FreeBSD.org (unknown [IPv6:2001:4f8:fff6::2f]) by hub.freebsd.org (Postfix) with SMTP id 3167D10656B8 for ; Sat, 30 Jun 2012 12:25:16 +0000 (UTC) (envelope-from aleek@FreeBSD.org) Received: by socsvn.FreeBSD.org (sSMTP sendmail emulation); Sat, 30 Jun 2012 12:25:16 +0000 Date: Sat, 30 Jun 2012 12:25:16 +0000 From: aleek@FreeBSD.org To: svn-soc-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Message-Id: <20120630122516.3167D10656B8@hub.freebsd.org> Cc: Subject: socsvn commit: r238629 - in soc2012/aleek/beaglexm-armv6/sys: arm/ti arm/ti/am37x boot/fdt/dts X-BeenThere: svn-soc-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the entire Summer of Code repository List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 30 Jun 2012 12:25:18 -0000 Author: aleek Date: Sat Jun 30 12:25:15 2012 New Revision: 238629 URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=238629 Log: enabled sdma controller Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer.h soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer_tc.c soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_prcm.c soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/files.am37x soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_sdma.c soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_sdmareg.h soc2012/aleek/beaglexm-armv6/sys/boot/fdt/dts/beagleboardxm.dts Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer.h ============================================================================== --- soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer.h Sat Jun 30 07:52:06 2012 (r238628) +++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer.h Sat Jun 30 12:25:15 2012 (r238629) @@ -114,13 +114,6 @@ void omap3_gptimer_intr_filter_ack(struct omap3_gptimer_softc *sc); -static inline uint32_t -omap3_gptimer_readl(struct omap3_gptimer_softc *sc, bus_size_t off); - - -static inline void -omap3_gptimer_writel(struct omap3_gptimer_softc *sc, bus_size_t off, uint32_t val); - int omap3_gptimer_activate(struct omap3_gptimer_softc *sc, unsigned int flags, unsigned int time_us, void (*callback)(void *data), void *data); Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer_tc.c ============================================================================== --- soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer_tc.c Sat Jun 30 07:52:06 2012 (r238628) +++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer_tc.c Sat Jun 30 12:25:15 2012 (r238629) @@ -66,17 +66,14 @@ #include #include +#define gptimer_read_4(reg) bus_read_4( sc->mem_res, reg ) +#define gptimer_write_4(reg, val) bus_write_4( sc->mem_res, reg, val ) + static struct omap3_gptimer_softc *g_omap3_gptimer_sc_tc = NULL; static struct omap3_gptimer_softc *g_omap3_gptimer_sc_et = NULL; static unsigned int delay_loops_per_us = 100; - -/** - * Timer for tick counting. This is used to measure time by CPU - */ -//static struct omap3_gptimer *omap3_gptimer_tc_tmr = NULL; - /** * Struct used by tc_init(), to init the timecounter */ @@ -121,7 +118,7 @@ * */ static int -omap3_calibrate_delay_loop(struct timecounter *tc) +omap3_calibrate_delay_loop(struct omap3_gptimer_softc *sc, struct timecounter *tc) { u_int oldirqstate; unsigned int start, end; @@ -133,7 +130,7 @@ start = omap3_gptimer_tc_get_timecount(tc); //__omap3_delay(10240); for (int usec=10240; usec > 0; usec--) - for (int32_t counts = 200; counts > 0; counts--) + //for (int32_t counts = 200; counts > 0; counts--) /* Prevent gcc from optimizing out the loop */ cpufunc_nullop(); @@ -145,7 +142,7 @@ nanosecs = ((uint64_t)(end - start) * 1000000000ULL) / tc->tc_frequency; delay_loops_per_us = (unsigned int)((uint64_t)(10240 * 1000) / nanosecs); - printf("OMAP3: delay loop calibrated to %u cycles\n", delay_loops_per_us); + device_printf( sc->sc_dev, "Delay loop calibrated to %u cycles\n", delay_loops_per_us); return (0); } @@ -185,7 +182,7 @@ if (!(sc->flags & OMAP3_GPTIMER_ACTIVATED_FLAG)) { ret = EINVAL; } else { - *cnt = omap3_gptimer_readl(sc, OMAP3_GPT_TCRR); + *cnt = gptimer_read_4(OMAP3_GPT_TCRR); ret = 0; } @@ -217,7 +214,7 @@ //OMAP3_GPTIMER_LOCK(sc); - omap3_gptimer_writel(sc, OMAP3_GPT_TCRR, cnt); + gptimer_write_4(OMAP3_GPT_TCRR, cnt); //OMAP3_GPTIMER_UNLOCK(sc); @@ -225,36 +222,6 @@ } -/** - * omap3_gptimer_readl - reads a 32-bit value from one of the timer registers - * @timer: Timer device context - * @off: The offset of a register from the timer register address range - * - * - * RETURNS: - * 32-bit value read from the register. - */ -static inline uint32_t -omap3_gptimer_readl(struct omap3_gptimer_softc *sc, bus_size_t off) -{ - return (bus_read_4(sc->mem_res, off)); -} - -/** - * omap3_gptimer_writel - writes a 32-bit value to one of the timer registers - * @timer: Timer device context - * @off: The offset of a register from the timer register address range - * @val: The value to write into the register - * - * - * RETURNS: - * nothing - */ -static inline void -omap3_gptimer_writel(struct omap3_gptimer_softc *sc, bus_size_t off, uint32_t val) -{ - bus_write_4(sc->mem_res, off, val); -} /** * omap_gptimer_get_freq - gets the frequency of an activated timer @@ -293,14 +260,14 @@ //OMAP3_GPTIMER_LOCK(sc); /* Determine if the pre-scalar is enabled and if so the prescaler value */ - tclr = omap3_gptimer_readl(sc, OMAP3_GPT_TCLR); + tclr = gptimer_read_4(OMAP3_GPT_TCLR); if (tclr & TCLR_PRE) prescaler = 1UL << (((tclr & TCLR_PTV_MASK) >> 2) + 1); else prescaler = 1; /* Get the reload count */ - tldr = omap3_gptimer_readl(sc, OMAP3_GPT_TLDR); + tldr = gptimer_read_4(OMAP3_GPT_TLDR); //OMAP3_GPTIMER_UNLOCK(sc); @@ -386,13 +353,13 @@ /* Reset the timer and poll on the reset complete flag */ if (sc->profile == OMAP_GPTIMER_PROFILE_OMAP3) { - omap3_gptimer_writel(sc, OMAP3_GPT_TIOCP_CFG, 0x2); + gptimer_write_4(OMAP3_GPT_TIOCP_CFG, 0x2); /* TODO: add a timeout */ - while ((omap3_gptimer_readl(sc, OMAP3_GPT_TISTAT) & 0x01) == 0x00) + while ((gptimer_read_4(OMAP3_GPT_TISTAT) & 0x01) == 0x00) continue; /* Clear the interrupt status */ - omap3_gptimer_writel(sc, OMAP3_GPT_TISR, TCAR | OVF | MAT); + gptimer_write_4(OMAP3_GPT_TISR, TCAR | OVF | MAT); } /* If the user supplied a zero value we set a free running timer */ @@ -430,33 +397,33 @@ /* Adjust the count and apply the prescaler */ tickcount >>= (prescaler + 1); - val = omap3_gptimer_readl(sc, OMAP3_GPT_TCLR); + val = gptimer_read_4(OMAP3_GPT_TCLR); val &= ~TCLR_PTV_MASK; val |= TCLR_PRE | (prescaler << 2); - omap3_gptimer_writel(sc, OMAP3_GPT_TCLR, val); + gptimer_write_4(OMAP3_GPT_TCLR, val); } /* Calculate the start value */ startcount = 0xFFFFFFFFUL - (uint32_t)(tickcount & 0xFFFFFFFFUL); - printf("%s, %d : freq64=%llu : tickcount=%llu : startcount=%u : time_us=%u\n", + device_printf( sc->sc_dev, "%s, %d : freq64=%llu : tickcount=%llu : startcount=%u : time_us=%u\n", __func__, __LINE__, freq64, tickcount, startcount, time_us); } /* Load the start value into the count register */ - omap3_gptimer_writel(sc, OMAP3_GPT_TCRR, startcount); + gptimer_write_4(OMAP3_GPT_TCRR, startcount); /* Enable autoload mode if configuring a periodic timer or system tick * timer. Also set the reload count to match the period tick count. */ if (flags & OMAP3_GPTIMER_PERIODIC_FLAG) { /* Enable auto reload */ - val = omap3_gptimer_readl(sc, OMAP3_GPT_TCLR); + val = gptimer_read_4(OMAP3_GPT_TCLR); val |= TCLR_AR; - omap3_gptimer_writel(sc, OMAP3_GPT_TCLR, val); + gptimer_write_4(OMAP3_GPT_TCLR, val); /* Set the reload value */ - omap3_gptimer_writel(sc, OMAP3_GPT_TLDR, startcount); + gptimer_write_4(OMAP3_GPT_TLDR, startcount); } /* If a callback function has been supplied setup a overflow interrupt */ @@ -475,9 +442,9 @@ /* Enable the overflow interrupts. */ if (sc->profile == OMAP_GPTIMER_PROFILE_OMAP3) { - val = omap3_gptimer_readl(sc, OMAP3_GPT_TIER); + val = gptimer_read_4(OMAP3_GPT_TIER); val |= OVF; - omap3_gptimer_writel(sc, OMAP3_GPT_TIER, val); + gptimer_write_4(OMAP3_GPT_TIER, val); } } @@ -510,9 +477,9 @@ //OMAP3_GPTIMER_LOCK(sc); - val = omap3_gptimer_readl(sc, OMAP3_GPT_TCLR); + val = gptimer_read_4(OMAP3_GPT_TCLR); val |= TCLR_ST; - omap3_gptimer_writel(sc, OMAP3_GPT_TCLR, val); + gptimer_write_4(OMAP3_GPT_TCLR, val); //OMAP3_GPTIMER_UNLOCK(sc); @@ -541,9 +508,9 @@ //OMAP3_GPTIMER_LOCK(sc); - val = omap3_gptimer_readl(sc, OMAP3_GPT_TCLR); + val = gptimer_read_4(OMAP3_GPT_TCLR); val &= ~TCLR_ST; - omap3_gptimer_writel(sc, OMAP3_GPT_TCLR, val); + gptimer_write_4(OMAP3_GPT_TCLR, val); //OMAP3_GPTIMER_UNLOCK(sc); @@ -594,9 +561,9 @@ /* Enable the overflow interrupts */ if (sc->profile == OMAP_GPTIMER_PROFILE_OMAP3) { - val = omap3_gptimer_readl(sc, OMAP3_GPT_TIER); + val = gptimer_read_4(OMAP3_GPT_TIER); val |= OVF; - omap3_gptimer_writel(sc, OMAP3_GPT_TIER, val); + gptimer_write_4(OMAP3_GPT_TIER, val); } //OMAP3_GPTIMER_UNLOCK(sc); @@ -623,11 +590,11 @@ /* Read the interrupt status flag and clear it */ /* Read the status and it with the enable flag */ - stat = omap3_gptimer_readl(sc, OMAP3_GPT_TISR); - stat &= omap3_gptimer_readl(sc, OMAP3_GPT_TIER); + stat = gptimer_read_4(OMAP3_GPT_TISR); + stat &= gptimer_read_4(OMAP3_GPT_TIER); /* Clear the status flag */ - omap3_gptimer_writel(sc, OMAP3_GPT_TISR, stat); + gptimer_write_4(OMAP3_GPT_TISR, stat); //OMAP3_GPTIMER_UNLOCK(sc); } @@ -686,11 +653,11 @@ if (sc->profile == OMAP_GPTIMER_PROFILE_OMAP3) { /* Read the status and it with the enable flag */ - stat = omap3_gptimer_readl(sc, OMAP3_GPT_TISR); - stat &= omap3_gptimer_readl(sc, OMAP3_GPT_TIER); + stat = gptimer_read_4(OMAP3_GPT_TISR); + stat &= gptimer_read_4(OMAP3_GPT_TIER); /* Clear the status flag */ - omap3_gptimer_writel(sc, OMAP3_GPT_TISR, stat); + gptimer_write_4(OMAP3_GPT_TISR, stat); } /* Store the callback details before releasing the lock */ @@ -820,7 +787,7 @@ tc_init(&omap3_gptimer_tc); /* Calibrate the delay loop */ - omap3_calibrate_delay_loop(&omap3_gptimer_tc); + omap3_calibrate_delay_loop( sc, &omap3_gptimer_tc); /* Restore interrupt state */ restore_interrupts(oldirqstate); Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_prcm.c ============================================================================== --- soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_prcm.c Sat Jun 30 07:52:06 2012 (r238628) +++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_prcm.c Sat Jun 30 12:25:15 2012 (r238629) @@ -183,6 +183,9 @@ static int omap3_clk_generic_get_source_freq(struct ti_clock_dev *clkdev, unsigned int *freq); +static int +omap3_clk_alwayson_null_func(struct ti_clock_dev *clkdev); + static const struct ti_clk_details* omap3_clk_details(clk_ident_t id); @@ -306,9 +309,9 @@ OMAP3_GENERIC_CLOCK_DEV(I2C2_CLK), OMAP3_GENERIC_CLOCK_DEV(I2C3_CLK), +#endif /* sDMA */ OMAP3_ALWAYSON_CLOCK_DEV(SDMA_CLK), -#endif { INVALID_CLK_IDENT, NULL, NULL, NULL, NULL } }; @@ -767,11 +770,24 @@ return NULL; } - - - - - +/** + * omap3_clk_alwayson_null_func - dummy function for always on clocks + * @clkdev: pointer to the clock device structure (ignored) + * @mem_res: array of memory resources mapped when PRCM driver attached (ignored) + * + * + * + * LOCKING: + * Inherits the locks from the omap_prcm driver, no internal locking. + * + * RETURNS: + * Returns 0 on success or a positive error code on failure. + */ +static int +omap3_clk_alwayson_null_func(struct ti_clock_dev *clkdev) +{ + return (0); +} /** Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/files.am37x ============================================================================== --- soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/files.am37x Sat Jun 30 07:52:06 2012 (r238628) +++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/files.am37x Sat Jun 30 12:25:15 2012 (r238629) @@ -3,9 +3,8 @@ arm/ti/aintc.c standard arm/ti/am37x/am37x_prcm.c standard arm/ti/am37x/am37x_gptimer_tc.c standard -#arm/ti/am37x/am37x_gptimer_et.c standard arm/ti/am37x/am37x_scm_padconf.c standard -arm/ti/ti_edma3.c standard +arm/ti/ti_sdma.c standard arm/ti/ti_mmchs.c optional mmc arm/ti/cpsw/if_cpsw.c optional cpsw arm/ti/am37x/am37x_early_uart.c standard Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_sdma.c ============================================================================== --- soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_sdma.c Sat Jun 30 07:52:06 2012 (r238628) +++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_sdma.c Sat Jun 30 12:25:15 2012 (r238629) @@ -201,6 +201,17 @@ } /** + * ti_sdma_is_am37x_rev - returns true if H/W is from OMAP4 series + * @sc: DMA device context + * + */ +static inline int +ti_sdma_is_am37x_rev(struct ti_sdma_softc *sc) +{ + return (sc->sc_hw_rev == DMA4_AM37X_REV); +} + +/** * ti_sdma_intr - interrupt handler for all 4 DMA IRQs * @arg: ignored * @@ -1176,7 +1187,7 @@ sc->sc_hw_rev = ti_sdma_read_4(sc, DMA4_REVISION); device_printf(dev, "sDMA revision %08x\n", sc->sc_hw_rev); - if (!ti_sdma_is_omap4_rev(sc) && !ti_sdma_is_omap3_rev(sc)) { + if (!ti_sdma_is_omap4_rev(sc) && !ti_sdma_is_omap3_rev(sc) && !ti_sdma_is_am37x_rev(sc)) { device_printf(sc->sc_dev, "error - unknown sDMA H/W revision\n"); return (EINVAL); } @@ -1223,6 +1234,7 @@ if (err) panic("%s: Cannot register IRQ", device_get_name(dev)); + // @todo XXX sc shoudn't be stored globally /* Store the DMA structure globally ... this driver should never be unloaded */ ti_sdma_sc = sc; Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_sdmareg.h ============================================================================== --- soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_sdmareg.h Sat Jun 30 07:52:06 2012 (r238628) +++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/ti_sdmareg.h Sat Jun 30 12:25:15 2012 (r238629) @@ -127,5 +127,6 @@ */ #define DMA4_OMAP3_REV 0x00000040 #define DMA4_OMAP4_REV 0x00010900 +#define DMA4_AM37X_REV 0x00000050 #endif /* __TI_SDMAREG_H__ */ Modified: soc2012/aleek/beaglexm-armv6/sys/boot/fdt/dts/beagleboardxm.dts ============================================================================== --- soc2012/aleek/beaglexm-armv6/sys/boot/fdt/dts/beagleboardxm.dts Sat Jun 30 07:52:06 2012 (r238628) +++ soc2012/aleek/beaglexm-armv6/sys/boot/fdt/dts/beagleboardxm.dts Sat Jun 30 12:25:15 2012 (r238629) @@ -137,6 +137,13 @@ clock-frequency = < 48000000 >; /* FIXME */ }; + sdma@48056000 { + compatible = "ti,sdma"; + reg = < 0x48056000 0x1000 >; + interrupts = < 12 13 14 15 >; + interrupt-parent = <&AINTC>; + }; + i2c0: i2c@48070000 {