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Date:      Sat, 15 Mar 2003 12:28:27 -0800 (PST)
From:      Brian Buchanan <brian@ncircle.com>
To:        <freebsd-gnats-submit@FreeBSD.org>
Cc:        <jhb@FreeBSD.org>
Subject:   i386/50099: [PATCH] AP initialization fails on some SMP motherboards
Message-ID:  <20030315122701.U1838-100000@mail.ncircle.com>

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>Number:         50099
>Category:       i386
>Synopsis:       [PATCH] AP initialization fails on some SMP motherboards
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    freebsd-bugs
>State:          open
>Quarter:        
>Keywords:       
>Date-Required:
>Class:          sw-bug
>Submitter-Id:   current-users
>Arrival-Date:   Tue Mar 18 08:10:03 PST 2003
>Closed-Date:
>Last-Modified:
>Originator:     Brian Buchanan
>Release:        FreeBSD 4.7-RELEASE i386
>Organization:
nCircle Network Security, Inc.
>Environment:
System: FreeBSD 4.7-RELEASE #0: Thu Feb 13 06:25:15 GMT 2003
    brian@grandchampion.eng.ncircle.com:/usr/src/sys/compile/CHAMPION

>Description:

AP initialization fails on some SMP motherboards, such as the Tyan S4520
Thunder GC-HE ("Grand Champion").  This particular motherboard supports 4
Intel Xeon processors.

Copyright (c) 1992-2002 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
        The Regents of the University of California. All rights reserved.
FreeBSD 4.7-RELEASE #0: Thu Feb 13 06:25:15 GMT 2003
    brian@grandchampion.eng.ncircle.com:/usr/src/sys/compile/CHAMPION
Timecounter "i8254"  frequency 1193182 Hz
CPU: Pentium 4 (1899.94-MHz 686-class CPU)
  Origin = "GenuineIntel"  Id = 0xf22  Stepping = 2

Features=0x3febfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMO
V,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,<b28>,ACC>
real memory  = 1073741824 (1048576K bytes)
avail memory = 1042354176 (1017924K bytes)
Programming 16 pins in IOAPIC #0
IOAPIC #0 intpin 2 -> irq 0
Programming 16 pins in IOAPIC #1
Programming 16 pins in IOAPIC #2
AP #1 (PHY# 2) failed!
panic y/n? [y]

The problem turns out to be the use of APIC_ID_MASK in a read-mask-write
sequence on the ICR HIGH register of the local APIC.  APIC_ID_MASK is
defined as 0x0f000000, which is appropriate for Pentium and P6 processors,
but not for the newer P4 and Xeon.  (Intel IA-32 Architecture Software
Developer's Manual, Volume 3: System Programmers Guide, pages 8-11 and 8-12)
For the P4 and the Xeon, the mask should be 0xff000000.

My first thought was to fix this by simply changing APIC_ID_MASK to
0xff000000, but while that will certainly work for P4 and Xeon processors, I
don't know if it will work correctly on older systems.  A safer fix, until
there's code in place to select the mask based on the type of processor, is
to simply write the entire ICR HIGH register when sending IPIs.  This is
safe for older and newer processors, because the reserved bits will be set
to zero in either case.  I don't have a copy of the Intel MP spec handy, but
IIRC it specifies that reserved bits can (and even should) be written zeros.

>How-To-Repeat:
Boot an SMP kernel on affected hardware.
>Fix:

Credits: Tyan Computer Corporation
         nCircle Network Security, Inc.

===================================================================
RCS file: /home/ncvs/src/sys/i386/i386/mp_machdep.c,v
retrieving revision 1.204
diff -u -r1.204 mp_machdep.c
--- mp_machdep.c        4 Mar 2003 20:24:53 -0000       1.204
+++ mp_machdep.c        15 Mar 2003 20:20:32 -0000
@@ -2252,8 +2252,7 @@
         */

        /* setup the address for the target AP */
-       icr_hi = lapic.icr_hi & ~APIC_ID_MASK;
-       icr_hi |= (physical_cpu << 24);
+       icr_hi = (physical_cpu << 24);
        lapic.icr_hi = icr_hi;

        /* do an INIT IPI: assert RESET */


 /* fields in LVT1/2 */


>Release-Note:
>Audit-Trail:
>Unformatted:

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