Date: Thu, 27 Jun 1996 19:57:42 -0400 From: Anil John <ajohn@mail.bcpl.lib.md.us> To: "'Greg Lehey'" <grog@lemis.de> Cc: FreeBSD Questions <questions@FreeBSD.org> Subject: RE: Compiling kernel for ATAPI CD-ROM error - fatal signal 11- what is it? Message-ID: <01BB6462.E7F53500@ppp15.bcpl.lib.md.us>
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Greg Lehey[SMTP:grog@lemis.de] wrote: > >OK, you're not done yet. So it's pretty certain that you have a cache >problem. Now you need to find out whether it's a hardware problem or >incorrect configuration. Many BIOSes have cache burst configuration >options (cache wait states, or burst configurations like 3-2-2-2 or >2-1-1-1 or some such). The cache is 128 bits wide, but the memory bus >is only 32 bits wide, so it needs 4 cycles to transfer a cache line. >The 3-2-2-2 means that the first transfer takes 3 bus cycles, and the >following ones only 2. I'd guess that you have your cache set up for >too few cycles. > I know what you mean The above settings are in my BIOS on my other machine. But I have an old Award BIOS on my system and I do not know what the corresponding items are. The relevent options on it are (* marks what I had when I got errors): Decoupled Refresh: Enabled*/Disabled Relocate 256k/384k: Enabled*/Disabled Video BIOS Cacheble: Enabled/Disabled* System BIOS Cacheble: Enabled/Disabled* External cache scheme: Wr-Through*/Write-Back Combine Alter & Tag Bits: Enabled*/Disabled Memory hole at 15Mb Addr: Enabled/Disabled* Cache Timing Control: Normal/Fast/Turbo* DRAM Timing Control: Normal/Fast* Fast DRAM: Enabled*/Disabled Burst Write: Enabled/Disabled* CPU Write Back Cache: Enabled*/Disabled P24T Cache Replace BLAST: Enabled/Disabled* Any suggestions would be appreciated... Anil
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