From owner-svn-src-head@FreeBSD.ORG Wed Sep 19 20:42:56 2012 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 98A821065677; Wed, 19 Sep 2012 20:42:56 +0000 (UTC) (envelope-from obrien@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 83D0B8FC1A; Wed, 19 Sep 2012 20:42:56 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q8JKgu2K066748; Wed, 19 Sep 2012 20:42:56 GMT (envelope-from obrien@svn.freebsd.org) Received: (from obrien@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q8JKguJi066746; Wed, 19 Sep 2012 20:42:56 GMT (envelope-from obrien@svn.freebsd.org) Message-Id: <201209192042.q8JKguJi066746@svn.freebsd.org> From: "David E. O'Brien" Date: Wed, 19 Sep 2012 20:42:56 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r240708 - head/share/man/man4 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Sep 2012 20:42:56 -0000 Author: obrien Date: Wed Sep 19 20:42:55 2012 New Revision: 240708 URL: http://svn.freebsd.org/changeset/base/240708 Log: Add Intel RdRand. Modified: head/share/man/man4/random.4 Modified: head/share/man/man4/random.4 ============================================================================== --- head/share/man/man4/random.4 Wed Sep 19 20:11:47 2012 (r240707) +++ head/share/man/man4/random.4 Wed Sep 19 20:42:55 2012 (r240708) @@ -315,11 +315,16 @@ and is an implementation of the .Em Yarrow algorithm by Bruce Schneier, .Em et al . -The only hardware implementation -currently is for the +The only hardware implementations +currently are for the .Tn VIA C3 Nehemiah (stepping 3 or greater) -CPU. +CPU +and the +.Tn Intel +.Dq Bull Mountain +.Em RdRand +instruction and underlying random number generator (RNG). More will be added in the future. .Pp The author gratefully acknowledges