From owner-svn-src-head@FreeBSD.ORG Wed May 5 21:07:48 2010 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 258341065672; Wed, 5 May 2010 21:07:48 +0000 (UTC) (envelope-from kib@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [69.147.83.44]) by mx1.freebsd.org (Postfix) with ESMTP id 0B2D68FC1C; Wed, 5 May 2010 21:07:48 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o45L7l0W064260; Wed, 5 May 2010 21:07:47 GMT (envelope-from kib@svn.freebsd.org) Received: (from kib@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o45L7lMA064255; Wed, 5 May 2010 21:07:47 GMT (envelope-from kib@svn.freebsd.org) Message-Id: <201005052107.o45L7lMA064255@svn.freebsd.org> From: Konstantin Belousov Date: Wed, 5 May 2010 21:07:47 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r207676 - in head/sys: amd64/amd64 amd64/include i386/i386 i386/include X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 May 2010 21:07:48 -0000 Author: kib Date: Wed May 5 21:07:47 2010 New Revision: 207676 URL: http://svn.freebsd.org/changeset/base/207676 Log: Add definitions for Intel AESNI CPUID bits and print the capabilities on boot. Hardware provided by: Sentex Communications MFC after: 1 week Modified: head/sys/amd64/amd64/identcpu.c head/sys/amd64/include/specialreg.h head/sys/i386/i386/identcpu.c head/sys/i386/include/specialreg.h Modified: head/sys/amd64/amd64/identcpu.c ============================================================================== --- head/sys/amd64/amd64/identcpu.c Wed May 5 20:54:16 2010 (r207675) +++ head/sys/amd64/amd64/identcpu.c Wed May 5 21:07:47 2010 (r207676) @@ -240,7 +240,7 @@ printcpuinfo(void) printf("\n Features2=0x%b", cpu_feature2, "\020" "\001SSE3" /* SSE3 */ - "\002" + "\002PCLMULQDQ" /* Carry-Less Mul Quadword */ "\003DTES64" /* 64-bit Debug Trace */ "\004MON" /* MONITOR/MWAIT Instructions */ "\005DS_CPL" /* CPL Qualified Debug Store */ @@ -264,7 +264,7 @@ printcpuinfo(void) "\027MOVBE" "\030POPCNT" "\031" - "\032" + "\032AESNI" /* AES Crypto*/ "\033XSAVE" "\034OSXSAVE" "\035" Modified: head/sys/amd64/include/specialreg.h ============================================================================== --- head/sys/amd64/include/specialreg.h Wed May 5 20:54:16 2010 (r207675) +++ head/sys/amd64/include/specialreg.h Wed May 5 21:07:47 2010 (r207676) @@ -113,6 +113,7 @@ #define CPUID_PBE 0x80000000 #define CPUID2_SSE3 0x00000001 +#define CPUID2_PCLMULQDQ 0x00000002 #define CPUID2_DTES64 0x00000004 #define CPUID2_MON 0x00000008 #define CPUID2_DS_CPL 0x00000010 @@ -131,6 +132,7 @@ #define CPUID2_X2APIC 0x00200000 #define CPUID2_MOVBE 0x00400000 #define CPUID2_POPCNT 0x00800000 +#define CPUID2_AESNI 0x02000000 /* * Important bits in the AMD extended cpuid flags Modified: head/sys/i386/i386/identcpu.c ============================================================================== --- head/sys/i386/i386/identcpu.c Wed May 5 20:54:16 2010 (r207675) +++ head/sys/i386/i386/identcpu.c Wed May 5 21:07:47 2010 (r207676) @@ -727,7 +727,7 @@ printcpuinfo(void) printf("\n Features2=0x%b", cpu_feature2, "\020" "\001SSE3" /* SSE3 */ - "\002" + "\002PCLMULQDQ" /* Carry-Less Mul Quadword */ "\003DTES64" /* 64-bit Debug Trace */ "\004MON" /* MONITOR/MWAIT Instructions */ "\005DS_CPL" /* CPL Qualified Debug Store */ @@ -751,7 +751,7 @@ printcpuinfo(void) "\027MOVBE" "\030POPCNT" "\031" - "\032" + "\032AESNI" /* AES Crypto*/ "\033XSAVE" "\034OSXSAVE" "\035" Modified: head/sys/i386/include/specialreg.h ============================================================================== --- head/sys/i386/include/specialreg.h Wed May 5 20:54:16 2010 (r207675) +++ head/sys/i386/include/specialreg.h Wed May 5 21:07:47 2010 (r207676) @@ -110,6 +110,7 @@ #define CPUID_PBE 0x80000000 #define CPUID2_SSE3 0x00000001 +#define CPUID2_PCLMULQDQ 0x00000002 #define CPUID2_DTES64 0x00000004 #define CPUID2_MON 0x00000008 #define CPUID2_DS_CPL 0x00000010 @@ -128,6 +129,7 @@ #define CPUID2_X2APIC 0x00200000 #define CPUID2_MOVBE 0x00400000 #define CPUID2_POPCNT 0x00800000 +#define CPUID2_AESNI 0x02000000 /* * Important bits in the AMD extended cpuid flags