From owner-svn-src-projects@FreeBSD.ORG Mon Jul 4 20:10:30 2011 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 61D1D1065674; Mon, 4 Jul 2011 20:10:30 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: from vlakno.cz (lev.vlakno.cz [46.28.110.116]) by mx1.freebsd.org (Postfix) with ESMTP id 234E48FC1C; Mon, 4 Jul 2011 20:10:29 +0000 (UTC) Received: by vlakno.cz (Postfix, from userid 1002) id A00377F4A4B; Mon, 4 Jul 2011 22:10:28 +0200 (CEST) Date: Mon, 4 Jul 2011 22:10:28 +0200 From: Roman Divacky To: Marcel Moolenaar Message-ID: <20110704201028.GA5939@freebsd.org> References: <201107041951.p64JpQDk032074@svn.freebsd.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201107041951.p64JpQDk032074@svn.freebsd.org> User-Agent: Mutt/1.4.2.3i Cc: svn-src-projects@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r223767 - in projects/llvm-ia64: contrib/llvm/lib/Target/IA64 lib/clang/include X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 04 Jul 2011 20:10:30 -0000 First of all.. big wow :) This is awesome progress. On Mon, Jul 04, 2011 at 07:51:26PM +0000, Marcel Moolenaar wrote: > Author: marcel > Date: Mon Jul 4 19:51:26 2011 > New Revision: 223767 > URL: http://svn.freebsd.org/changeset/base/223767 > > Log: > o Implement LowerFormalArguments() LowerReturn() using CallingConv and > for general registers only. > o Implement IA64InstrInfo::copyPhysReg() for general registers. This > is needed during lowering and before copy elimination. This seems wrong. See below. > +void > +IA64InstrInfo::copyPhysReg(MachineBasicBlock &MBB, > + MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, > + unsigned SrcReg, bool KillSrc) const > +{ > + bool GRDest = IA64::GRRegClass.contains(DestReg); > + bool GRSrc = IA64::GRRegClass.contains(SrcReg); > + > + if (GRDest && GRSrc) { > + MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, get(IA64::ADD), DestReg); > + MIB.addReg(IA64::R0); > + MIB.addReg(SrcReg, getKillRegState(KillSrc)); > + return; > + } > + > + llvm_unreachable(__func__); > +} copyPhysReg() done via ADD ? Is this just some temporary measure to achieve emission of any code? I am not even sure how this can work. The IR should require you to lower the ISD::ADD node, right? You don't seem to be doing that. Anyway, pretty good progress - seems like you're getting grasp of LLVM very fast! roman