From owner-freebsd-embedded@FreeBSD.ORG Wed May 7 20:20:18 2014 Return-Path: Delivered-To: freebsd-embedded@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 25A40935 for ; Wed, 7 May 2014 20:20:18 +0000 (UTC) Received: from mail.fizon.de (mail.fizon.de [85.159.14.100]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id BAEDAA1D for ; Wed, 7 May 2014 20:20:17 +0000 (UTC) Received: from [192.168.2.76] (p54995F74.dip0.t-ipconnect.de [84.153.95.116]) (authenticated bits=0) by mail.fizon.de (8.14.5/8.14.5) with ESMTP id s47JmpgK043464 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NO); Wed, 7 May 2014 21:48:52 +0200 (CEST) (envelope-from mail@sezi.eu) From: Sebastian Zietz Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: quoted-printable Subject: GPIO interrupts on Carambola2 Date: Wed, 7 May 2014 21:48:52 +0200 Message-Id: <1A78D43F-9406-4DAB-8554-D8802DE8A3E1@sezi.eu> To: freebsd-embedded@freebsd.org Mime-Version: 1.0 (Mac OS X Mail 7.2 \(1874\)) X-Mailer: Apple Mail (2.1874) X-BeenThere: freebsd-embedded@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Dedicated and Embedded Systems List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 May 2014 20:20:18 -0000 Hi all, since I am not much into device driver programming jet I hope you can = help me with my problem. I have a hardware button on GPIO pin 22 and = can=92t generate interrupts on it. In sys/mips/atheros/ar71xx_gpio.c I=92d= like to do something like: 331 static void 332 ar71xx_gpio_intr(void *arg) 333 { 334 struct ar71xx_gpio_softc *sc =3D arg; 335 GPIO_LOCK(sc); 336 /* TODO: something useful */ 337 devctl_notify("GPIO", "pin22", "notify", NULL); 338 GPIO_UNLOCK(sc); 339 } To get it working I tried this without success: 410 /* Configure all pins as input */ 411 /* disable interrupts for all pins */ 412 GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0); 413 GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, (1 << 22)); I didn=92t managed to come up with pin 22 as input either. I am thankful = for any help!=