From nobody Fri Jul 10 15:28:27 2026 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4gxbMJ1ZN2z6lJ6H for ; Fri, 10 Jul 2026 15:28:28 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR1" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4gxbMH5tD8z43yj for ; Fri, 10 Jul 2026 15:28:27 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1783697307; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=QNfUp8GjtU90ZJ1/znM8rJNZx6ICMoVdTcFufdo8o4A=; b=APi3VW51aYBiti+pXkrXD1Z//lNhir6g8Wg/5IIOQo7rdPw5IW0+kamEGPrxtC8SPi0Hau NLJZuRY0GZblDlACiWj+hWUC/lzbMZljxBpCNGOn05sl/ZJgNvvMk6pkcdiPvexKw0UONS 3g2UZZwVa6qFLzQZIkysW4ekDTnB/qcObxuTut+7y2jNbEMAnNjAT+rwsy9xefNLGi5Amk wWlcCZ/E/ZZYA5YxI2JgPL3LxMJh29WNqvlbCPcWrQQWtDMlhu1fkUeoLuzCntQ7KkQPHX VMWHBf/KcJtPZRpO8hZRzHILtr8z3q3ef0xnTd45WH6cOzdX7ORQU2tbOex3pg== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1783697307; a=rsa-sha256; cv=none; b=sMZLmT0ixu9azYbYLd3utC4sZ78u/lMCPwRhDL6T1G2VZZ7wCAKMZDLlHH9ZvtE9q6LfqT RKEKnF4qdjC8RG+jmOWkABfQhO2aAne35MYukbnFJ5rLBhScy4UV8Mk2JHvk0sXe/VkYcu jdFDL7js/LKAtYwnc7XINKesxcbnUPZFjVebrS3LrQXo3VslsNB3B7P3808dayTQIAL9ny 008nnEOqiFDgNavKl/kBAqy6koDI1UojM4u6MZ1peryWdEvPUgnHkHZIyu0IEK2FPHyOOj h670BDGBSvlot/nTRCIW396VpvT0GvRL825saRhEH3T0k0iY5mh+jjeNYboqsA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1783697307; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=QNfUp8GjtU90ZJ1/znM8rJNZx6ICMoVdTcFufdo8o4A=; b=uXynndqlXmK1Zb84RlVZxNYIHIxtQdD5kTrdbXEEWFzYqNC+u57W87MDU6pjxb/Y7E5rI5 FJhUwFz2qFthF3GnfhV1o7M4znEgI0/K/IzOPkU03Y2FcTHULynXV58roLKdlkKZ+5Q9mx Otey5bkH2y+sjOeJZGWM37Of01Ph9dJ6qIpG8K7gcCvVHsBN+xrm1CiT+qhaktIW2uUOK/ pEXTYFgIObn+kyPMKUN0O1BzZbRfOHgU7TCj73pRBS2EdUpR9UgPifrAWi6J+62pMsTdCr 2DwFRW03OdYHeUv3ETgyeVjh9Nr5OYrlk5BKShdp1JRN6F5ac8y8ezhzjIMvJg== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4gxbMH4ZCQz112D for ; Fri, 10 Jul 2026 15:28:27 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 33696 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Fri, 10 Jul 2026 15:28:27 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Cc: Ali Mashtizadeh From: Mitchell Horne Subject: git: 620bca5338ab - stable/15 - hwpmc: Disable AMD PMCs if in an unsupported VM List-Id: Commits to the stable branches of the FreeBSD src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-branches@freebsd.org Sender: owner-dev-commits-src-branches@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mhorne X-Git-Repository: src X-Git-Refname: refs/heads/stable/15 X-Git-Reftype: branch X-Git-Commit: 620bca5338abdb599e304e3437446f7731cb78db Auto-Submitted: auto-generated Date: Fri, 10 Jul 2026 15:28:27 +0000 Message-Id: <6a510f9b.33696.51ad5500@gitrepo.freebsd.org> The branch stable/15 has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=620bca5338abdb599e304e3437446f7731cb78db commit 620bca5338abdb599e304e3437446f7731cb78db Author: Ali Mashtizadeh AuthorDate: 2026-06-05 23:48:53 +0000 Commit: Mitchell Horne CommitDate: 2026-07-10 15:28:08 +0000 hwpmc: Disable AMD PMCs if in an unsupported VM AMD does not have a CPUID bit to indicate the lack of K8 PMCs. If all other PMC features are not present we should test an event selector to see if it stores and returns a value. If the VM is implemented correctly, this should result in a #GP on the initial wrmsr_safe. Bhyve and a few other VMs ignore writes, so I got one step further and test that it retains the OS and USR bits. Tested on Zen 5 native and a Zen 5 Bhyve virtual machine. This code should not run on any recent hardware, except in a VM, as it checks that the core counter extension is missing. PR: 268943 Reported by: Sandipan Das, John F. Carr Reviewed by: mhorne, imp Sponsored by: Netflix MFC after: 1 week Pull Request: https://github.com/freebsd/freebsd-src/pull/2272/changes (cherry picked from commit dded0ab415cc09eed506968366e383d406834823) --- sys/dev/hwpmc/hwpmc_amd.c | 37 +++++++++++++++++++++++++++++++++++-- 1 file changed, 35 insertions(+), 2 deletions(-) diff --git a/sys/dev/hwpmc/hwpmc_amd.c b/sys/dev/hwpmc/hwpmc_amd.c index c174502caefb..e950ee3c84af 100644 --- a/sys/dev/hwpmc/hwpmc_amd.c +++ b/sys/dev/hwpmc/hwpmc_amd.c @@ -788,12 +788,14 @@ amd_pcpu_fini(struct pmc_mdep *md, int cpu) struct pmc_mdep * pmc_amd_initialize(void) { + struct amd_descr *d; struct pmc_classdep *pcd; struct pmc_mdep *pmc_mdep; + uint64_t reg; enum pmc_cputype cputype; - int error, i, ncpus; + int ncpus, i; int family, model, stepping; - struct amd_descr *d; + int error; /* * The presence of hardware performance counters on the AMD @@ -824,6 +826,37 @@ pmc_amd_initialize(void) return (NULL); } + /* + * Unforunately, there is no way to communicate that the original four + * core counters are disabled through CPUIDs alone. We attempt to + * write and read back the MSR to validate that it is working. + * + * Referenced the BIOS and Kernel Developer Guide for AMD Athlon 64 and + * AMD Opteron Processors 26094 Rev. 3.24 January, 2005 to ensure these + * fields are valid. + */ + if ((amd_feature2 & AMDID2_PCXC) == 0) { + error = wrmsr_safe(AMD_PMC_EVSEL_0, AMD_PMC_OS | AMD_PMC_USR); + if (error != 0) { + printf("hwpmc: AMD evsel 0 wrmsr failed!\n"); + return (NULL); + } + + error = rdmsr_safe(AMD_PMC_EVSEL_0, ®); + if (error != 0) { + printf("hwpmc: AMD evsel 0 rdmsr failed!\n"); + return (NULL); + } + + if (reg == 0) { + printf("hwpmc: AMD evsel returned invalid value! " + "You may be in a VM without PMC support.\n"); + return (NULL); + } + + wrmsr(AMD_PMC_EVSEL_0, 0); + } + /* * From PPR for AMD Family 1Ah, a new cpuid leaf specifies the maximum * number of PMCs of each type. If we do not have that leaf, we use