From owner-freebsd-mips@FreeBSD.ORG Thu Aug 5 06:13:56 2010 Return-Path: Delivered-To: mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 536FB106567B for ; Thu, 5 Aug 2010 06:13:56 +0000 (UTC) (envelope-from alc@cs.rice.edu) Received: from mail.cs.rice.edu (mail.cs.rice.edu [128.42.1.31]) by mx1.freebsd.org (Postfix) with ESMTP id 28EFC8FC26 for ; Thu, 5 Aug 2010 06:13:56 +0000 (UTC) Received: from mail.cs.rice.edu (localhost.localdomain [127.0.0.1]) by mail.cs.rice.edu (Postfix) with ESMTP id ADF512C2B02; Thu, 5 Aug 2010 01:13:55 -0500 (CDT) X-Virus-Scanned: by amavis-2.4.0 at mail.cs.rice.edu Received: from mail.cs.rice.edu ([127.0.0.1]) by mail.cs.rice.edu (mail.cs.rice.edu [127.0.0.1]) (amavisd-new, port 10024) with LMTP id fm86fC4LudFK; Thu, 5 Aug 2010 01:13:48 -0500 (CDT) Received: from adsl-216-63-78-18.dsl.hstntx.swbell.net (adsl-216-63-78-18.dsl.hstntx.swbell.net [216.63.78.18]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.cs.rice.edu (Postfix) with ESMTP id CFA7A2C2B32; Thu, 5 Aug 2010 01:13:47 -0500 (CDT) Message-ID: <4C5A569B.9090401@cs.rice.edu> Date: Thu, 05 Aug 2010 01:13:47 -0500 From: Alan Cox User-Agent: Thunderbird 2.0.0.24 (X11/20100501) MIME-Version: 1.0 To: "Jayachandran C." References: <201008041412.o74ECAix092415@svn.freebsd.org> In-Reply-To: <201008041412.o74ECAix092415@svn.freebsd.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Cc: mips@freebsd.org Subject: Re: svn commit: r210846 - in head/sys/mips: include mips X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 05 Aug 2010 06:13:56 -0000 Just an observation ... Jayachandran C. wrote: > Author: jchandra > Date: Wed Aug 4 14:12:09 2010 > New Revision: 210846 > URL: http://svn.freebsd.org/changeset/base/210846 > > Log: > Add 3 level page tables for MIPS in n64. > > - 32 bit compilation will still use old 2 level page tables > - re-arrange pmap code so that adding another level is easier > - pmap code for 3 level page tables for n64 > - update TLB handler to traverse 3 levels in n64 > > Reviewed by: jmallett > [snip] > > - if (pbits != *pte) { > - if (!atomic_cmpset_int((u_int *)pte, obits, pbits)) > - goto retry; > - pmap_update_page(pmap, sva, pbits); > + /* Skip invalid PTEs */ > + if (!pte_test(pte, PTE_V)) > + continue; > +retry: > + obits = pbits = *pte; > + pa = TLBLO_PTE_TO_PA(pbits); > + if (page_is_managed(pa) && pte_test(&pbits, PTE_D)) { > + m = PHYS_TO_VM_PAGE(pa); > + vm_page_dirty(m); > + m->md.pv_flags &= ~PV_TABLE_MOD; > + } > + pte_clear(&pbits, PTE_D); > + pte_set(&pbits, PTE_RO); > + > + if (pbits != *pte) { > + if (!atomic_cmpset_int((u_int *)pte, obits, pbits)) > + goto retry; > + pmap_update_page(pmap, sva, pbits); > + } > } > MIPS doesn't really need to use atomic_cmpset_int() in situations like this because the software dirty bit emulation in trap.c acquires the pmap lock. Atomics like this appear to be a carryover from i386 where the hardware-managed TLB might concurrently set the modified bit.