From nobody Wed Jul 24 19:43:57 2024 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4WTkwZ0dBhz5QJts; Wed, 24 Jul 2024 19:43:58 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R11" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4WTkwZ06Xcz4Vbg; Wed, 24 Jul 2024 19:43:58 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1721850238; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=yhR7WBqC1LdUZkOYA7pBVN5uDCwWOONqTO9Wyww9K20=; b=OC+sYwps6JiBbDN8QKi3zw0TWqbkMlGPlKcD3YuMNTTvvtbtw/IJATcNeKFwntyll991Jm eiqg3NqiyI9bOS7IOD/awORRhQfcZmx7wpObbshUiX231ikmWQ1Tr8xOb82EM7v0HW8ivJ kwK/aSndE3IQ2tvVid8YsbRRwoZY89so696hQc6qWCpYvd3/52hjB8h3OUJ6sLWloAFTWS FOONbrSadjL7HVDTT6tSJARtsaIZua0nr6t4x2dNPa7iqqKjmteRfEKe55zpoIDJmdmRkp Ceja8cVzD5HjJH0ikX2qUoC1yj0PwUvoSI6QK31O2rUeHWILEVqJDB2hDVxRwQ== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1721850238; a=rsa-sha256; cv=none; b=mufWW8IRWUOEcMzNsb+gmeZrXHPFAqR1l5nfVo5DVqs6qrcZKAEaNQCsQW/tRvW4obMXZ9 tGGxTBl0djCHLLg+4FNsefNKz7OF74OTDVhESXzUdGn8+dvI7QLPEe0ZHSYHK/SE4MVol8 EOrqnc9Sk1Fd30fXKSctMCP0QE8fdoUpx/YAD4IyA1MmserAaa1m57HV07z85JLRVA/ufW +onR6I6zrXr0EpMo2reu2paGHFWJNgZZOCyEhA11JHX5u/EVjCIjoU3gMYXB54DVr3Mry1 duxK3SkoI7S5TmCE4lD19GIvSk6VW2bJSbm4D/c2+Yc+1IVvp5xo6dJGCItSyA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1721850238; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=yhR7WBqC1LdUZkOYA7pBVN5uDCwWOONqTO9Wyww9K20=; b=N9Z6ccPsKIN2U20Ow/OHEI+NKpH+rTHOPbi9u40EUPwNov/cJFI50xWaeZRiJ2KztObnTe o/CjUncKTU4jHmA5xKtobP6yeTj2kRQOp6Cl9RdFNo57NqFzEgb5XhTiQPnKNKb/8nrsKo o0PsOFVVwNmaj00PlZ3rFzgn3Ksma0MCR6UTicfyjV5DtvGmuJfHjWgnFyBr4YOGsVV2ED vCEr1IVaKzjJHsGVi5jgv6RUIgXSMf3UV7zKFIEiCxgIWGvGoXoT0Z8QBPG4CR3XCU8gbb 8BB5L/T/njcsa3gH8eX46/L1a+OhVitcJX8rAUIY7y+6xiIX80wDb4nO6WwFsA== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4WTkwY6qX9zPtF; Wed, 24 Jul 2024 19:43:57 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 46OJhvbu010944; Wed, 24 Jul 2024 19:43:57 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 46OJhvgR010941; Wed, 24 Jul 2024 19:43:57 GMT (envelope-from git) Date: Wed, 24 Jul 2024 19:43:57 GMT Message-Id: <202407241943.46OJhvgR010941@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Dimitry Andric Subject: git: 2c75d993783c - stable/14 - Fix llvm register allocator for native/cross build differences List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: dim X-Git-Repository: src X-Git-Refname: refs/heads/stable/14 X-Git-Reftype: branch X-Git-Commit: 2c75d993783ca4b0d1bf8dcdf424643781326e4b Auto-Submitted: auto-generated The branch stable/14 has been updated by dim: URL: https://cgit.FreeBSD.org/src/commit/?id=2c75d993783ca4b0d1bf8dcdf424643781326e4b commit 2c75d993783ca4b0d1bf8dcdf424643781326e4b Author: Dimitry Andric AuthorDate: 2024-07-21 20:37:27 +0000 Commit: Dimitry Andric CommitDate: 2024-07-24 19:25:53 +0000 Fix llvm register allocator for native/cross build differences Work around an issue in LLVM's register allocator, which can cause slightly different i386 object files, when produced by a native or cross build of clang. This adds another volatile qualifier to a float variable declaration in the weightCalcHelper() function, which otherwise produces slightly different float results on amd64 and i386 hosts. In turn, this can lead to different (but equivalent) register choices, and thus non-identical assembly code. See https://github.com/llvm/llvm-project/issues/99396 for more details. Note this is a temporary fix, meant to merge in time for 13.4. As soon as upstream has a permanent solution we will import that. PR: 276961 Reported by: cperciva MFC after: 3 days (cherry picked from commit 397c2693fa66508cb5e6b173650a1f3bc6c4dd4f) --- contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp b/contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp index f3cb7fa5af61..afde8d001f88 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp @@ -256,7 +256,12 @@ float VirtRegAuxInfo::weightCalcHelper(LiveInterval &LI, SlotIndex *Start, return -1.0f; } - float Weight = 1.0f; + // FreeBSD customization: similar to the HWeight declaration below, add a + // volatile qualifier to avoid slightly different weight results on amd64 + // and i386 hosts, and possibly choosing different registers in the register + // allocator. See for + // more details. + volatile float Weight = 1.0f; if (IsSpillable) { // Get loop info for mi. if (MI->getParent() != MBB) {