From owner-freebsd-questions@FreeBSD.ORG Sat Jan 3 05:19:24 2004 Return-Path: Delivered-To: freebsd-questions@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 7A98516A4CE for ; Sat, 3 Jan 2004 05:19:24 -0800 (PST) Received: from mail1.panix.com (mail1.panix.com [166.84.1.72]) by mx1.FreeBSD.org (Postfix) with ESMTP id 4662643D53 for ; Sat, 3 Jan 2004 05:19:23 -0800 (PST) (envelope-from stanb@panix.com) Received: from panix.com (brillig.panix.com [166.84.1.76]) by mail1.panix.com (Postfix) with ESMTP id B8ABB48AD2 for ; Sat, 3 Jan 2004 08:19:22 -0500 (EST) Received: from teddy.fas.com (pcp01010374pcs.mplsnt01.sc.comcast.net [68.58.176.69]) by panix.com (Postfix) with ESMTP id 8CD032AA10 for ; Sat, 3 Jan 2004 08:19:22 -0500 (EST) Received: from stan by teddy.fas.com with local (Exim 3.36 #1 (Debian)) id 1AclgY-0006mR-00 for ; Sat, 03 Jan 2004 08:19:22 -0500 Date: Sat, 3 Jan 2004 08:19:22 -0500 From: stan To: freebsd-questions@FreeBSD.ORG Message-ID: <20040103131922.GB25935@teddy.fas.com> Mail-Followup-To: freebsd-questions@FreeBSD.ORG References: <20040103015813.16976.qmail@web14603.mail.yahoo.com> <3FF62DB8.4040707@natzo.com> <003801c3d1a6$3bcfdb40$f4f0a8c0@pcmedx.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <003801c3d1a6$3bcfdb40$f4f0a8c0@pcmedx.com> X-Editor: gVim X-Operating-System: Debian GNU/Linux X-Kernel-Version: 2.4.23 X-Uptime: 08:08:15 up 8 days, 14:59, 2 users, load average: 0.00, 0.01, 0.00 User-Agent: Mutt/1.5.4i Sender: Stan Brown Subject: Re: AMD Processors X-BeenThere: freebsd-questions@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: User questions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 03 Jan 2004 13:19:24 -0000 On Fri, Jan 02, 2004 at 07:03:58PM -0800, Mike Maltese wrote: > > For the kernel configuration you can even optimize the compilation for > > such processors (5.x only) : > > > > options CPU_ATHLON_SSE_HACK > > options CPU_ENABLE_SSE > > These are also valid kernel options for 4.x. Where are these documented? -- "They that would give up essential liberty for temporary safety deserve neither liberty nor safety." -- Benjamin Franklin