From owner-svn-src-head@freebsd.org Wed Oct 28 02:37:25 2015 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id DE134A1FB88; Wed, 28 Oct 2015 02:37:25 +0000 (UTC) (envelope-from cem@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id B3A6E1155; Wed, 28 Oct 2015 02:37:25 +0000 (UTC) (envelope-from cem@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id t9S2bOvN061841; Wed, 28 Oct 2015 02:37:24 GMT (envelope-from cem@FreeBSD.org) Received: (from cem@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id t9S2bOn9061836; Wed, 28 Oct 2015 02:37:24 GMT (envelope-from cem@FreeBSD.org) Message-Id: <201510280237.t9S2bOn9061836@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: cem set sender to cem@FreeBSD.org using -f From: "Conrad E. Meyer" Date: Wed, 28 Oct 2015 02:37:24 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r290087 - head/sys/dev/ioat X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 28 Oct 2015 02:37:26 -0000 Author: cem Date: Wed Oct 28 02:37:24 2015 New Revision: 290087 URL: https://svnweb.freebsd.org/changeset/base/290087 Log: ioat: Define DMACAPABILITY bits Check for BFILL capability before initiating blockfill operations. Sponsored by: EMC / Isilon Storage Division Modified: head/sys/dev/ioat/ioat.c head/sys/dev/ioat/ioat.h head/sys/dev/ioat/ioat_hw.h head/sys/dev/ioat/ioat_internal.h head/sys/dev/ioat/ioat_test.c Modified: head/sys/dev/ioat/ioat.c ============================================================================== --- head/sys/dev/ioat/ioat.c Tue Oct 27 23:49:32 2015 (r290086) +++ head/sys/dev/ioat/ioat.c Wed Oct 28 02:37:24 2015 (r290087) @@ -364,14 +364,16 @@ ioat3_attach(device_t device) struct ioat_descriptor **ring; struct ioat_descriptor *next; struct ioat_dma_hw_descriptor *dma_hw_desc; - uint32_t capabilities; int i, num_descriptors; int error; uint8_t xfercap; error = 0; ioat = DEVICE2SOFTC(device); - capabilities = ioat_read_dmacapability(ioat); + ioat->capabilities = ioat_read_dmacapability(ioat); + + ioat_log_message(1, "Capabilities: %b\n", (int)ioat->capabilities, + IOAT_DMACAP_STR); xfercap = ioat_read_xfercap(ioat); ioat->max_xfer_size = 1 << xfercap; @@ -760,6 +762,12 @@ ioat_blockfill(bus_dmaengine_t dmaengine CTR0(KTR_IOAT, __func__); ioat = to_ioat_softc(dmaengine); + if ((ioat->capabilities & IOAT_DMACAP_BFILL) == 0) { + ioat_log_message(0, "%s: Device lacks BFILL capability\n", + __func__); + return (NULL); + } + if ((dst & (0xffffull << 48)) != 0) { ioat_log_message(0, "%s: High 16 bits of dst invalid\n", __func__); Modified: head/sys/dev/ioat/ioat.h ============================================================================== --- head/sys/dev/ioat/ioat.h Tue Oct 27 23:49:32 2015 (r290086) +++ head/sys/dev/ioat/ioat.h Wed Oct 28 02:37:24 2015 (r290087) @@ -71,6 +71,8 @@ void ioat_release(bus_dmaengine_t dmaeng /* * Issue a blockfill operation. The 64-bit pattern 'fillpattern' is written to * 'len' physically contiguous bytes at 'dst'. + * + * Only supported on devices with the BFILL capability. */ struct bus_dmadesc *ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst, uint64_t fillpattern, bus_size_t len, bus_dmaengine_callback_t callback_fn, Modified: head/sys/dev/ioat/ioat_hw.h ============================================================================== --- head/sys/dev/ioat/ioat_hw.h Tue Oct 27 23:49:32 2015 (r290086) +++ head/sys/dev/ioat/ioat_hw.h Wed Oct 28 02:37:24 2015 (r290087) @@ -54,6 +54,21 @@ __FBSDID("$FreeBSD$"); #define IOAT_CS_STATUS_OFFSET 0x0E #define IOAT_DMACAPABILITY_OFFSET 0x10 +#define IOAT_DMACAP_PB (1 << 0) +#define IOAT_DMACAP_DCA (1 << 4) +#define IOAT_DMACAP_BFILL (1 << 6) +#define IOAT_DMACAP_XOR (1 << 8) +#define IOAT_DMACAP_PQ (1 << 9) +#define IOAT_DMACAP_DMA_DIF (1 << 10) +#define IOAT_DMACAP_DWBES (1 << 13) +#define IOAT_DMACAP_RAID16SS (1 << 17) +#define IOAT_DMACAP_DMAMC (1 << 18) +#define IOAT_DMACAP_CTOS (1 << 19) + +#define IOAT_DMACAP_STR \ + "\20\24Completion_Timeout_Support\23DMA_with_Multicasting_Support" \ + "\22RAID_Super_descriptors\16Descriptor_Write_Back_Error_Support" \ + "\13DMA_with_DIF\12PQ\11XOR\07Block_Fill\05DCA\01Page_Break" /* DMA Channel Registers */ #define IOAT_CHANCTRL_OFFSET 0x80 Modified: head/sys/dev/ioat/ioat_internal.h ============================================================================== --- head/sys/dev/ioat/ioat_internal.h Tue Oct 27 23:49:32 2015 (r290086) +++ head/sys/dev/ioat/ioat_internal.h Wed Oct 28 02:37:24 2015 (r290087) @@ -373,6 +373,7 @@ struct ioat_softc { int pci_resource_id; struct resource *pci_resource; uint32_t max_xfer_size; + uint32_t capabilities; struct resource *res; int rid; Modified: head/sys/dev/ioat/ioat_test.c ============================================================================== --- head/sys/dev/ioat/ioat_test.c Tue Oct 27 23:49:32 2015 (r290086) +++ head/sys/dev/ioat/ioat_test.c Wed Oct 28 02:37:24 2015 (r290087) @@ -319,6 +319,15 @@ ioat_dma_test(void *arg) return; } + if (test->testkind == IOAT_TEST_FILL && + (to_ioat_softc(dmaengine)->capabilities & IOAT_DMACAP_BFILL) == 0) + { + ioat_test_log(0, + "Hardware doesn't support block fill, aborting test\n"); + test->status[IOAT_TEST_INVALID_INPUT]++; + goto out; + } + index = g_thread_index++; TAILQ_INIT(&test->free_q); TAILQ_INIT(&test->pend_q);