From owner-svn-src-head@FreeBSD.ORG Thu Sep 4 01:46:09 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 49464B1D; Thu, 4 Sep 2014 01:46:09 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 29449173B; Thu, 4 Sep 2014 01:46:09 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id s841k9iA098250; Thu, 4 Sep 2014 01:46:09 GMT (envelope-from jhb@FreeBSD.org) Received: (from jhb@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id s841k7uo098240; Thu, 4 Sep 2014 01:46:07 GMT (envelope-from jhb@FreeBSD.org) Message-Id: <201409040146.s841k7uo098240@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: jhb set sender to jhb@FreeBSD.org using -f From: John Baldwin Date: Thu, 4 Sep 2014 01:46:07 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r271076 - in head/sys: amd64/amd64 amd64/include i386/i386 i386/include pc98/pc98 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Sep 2014 01:46:09 -0000 Author: jhb Date: Thu Sep 4 01:46:06 2014 New Revision: 271076 URL: http://svnweb.freebsd.org/changeset/base/271076 Log: - Move prototypes for various functions into out of C files and into . - Move some CPU-related variables out of i386/i386/identcpu.c to initcpu.c to match amd64. - Move the declaration of has_f00f_hack out of identcpu.c to machdep.c. - Remove a misleading comment from i386/i386/initcpu.c (locore zeros the BSS before it calls identify_cpu()) and remove explicit zero assignments to reduce the diff with amd64. Modified: head/sys/amd64/amd64/identcpu.c head/sys/amd64/amd64/machdep.c head/sys/amd64/include/md_var.h head/sys/i386/i386/identcpu.c head/sys/i386/i386/initcpu.c head/sys/i386/i386/machdep.c head/sys/i386/i386/trap.c head/sys/i386/include/md_var.h head/sys/pc98/pc98/machdep.c Modified: head/sys/amd64/amd64/identcpu.c ============================================================================== --- head/sys/amd64/amd64/identcpu.c Thu Sep 4 01:38:31 2014 (r271075) +++ head/sys/amd64/amd64/identcpu.c Thu Sep 4 01:46:06 2014 (r271076) @@ -64,15 +64,8 @@ __FBSDID("$FreeBSD$"); #include #include -/* XXX - should be in header file: */ -void printcpuinfo(void); -void identify_cpu(void); -void earlysetcpuclass(void); -void panicifcpuunsupported(void); - static u_int find_cpu_vendor_id(void); static void print_AMD_info(void); -static void print_AMD_assoc(int i); static void print_via_padlock_info(void); static void print_vmx_info(void); Modified: head/sys/amd64/amd64/machdep.c ============================================================================== --- head/sys/amd64/amd64/machdep.c Thu Sep 4 01:38:31 2014 (r271075) +++ head/sys/amd64/amd64/machdep.c Thu Sep 4 01:46:06 2014 (r271076) @@ -151,10 +151,6 @@ CTASSERT(offsetof(struct pcpu, pc_curthr extern u_int64_t hammer_time(u_int64_t, u_int64_t); -extern void printcpuinfo(void); /* XXX header file */ -extern void identify_cpu(void); -extern void panicifcpuunsupported(void); - #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) Modified: head/sys/amd64/include/md_var.h ============================================================================== --- head/sys/amd64/include/md_var.h Thu Sep 4 01:38:31 2014 (r271075) +++ head/sys/amd64/include/md_var.h Thu Sep 4 01:46:06 2014 (r271076) @@ -105,14 +105,17 @@ void fsbase_load_fault(void) __asm(__STR void gsbase_load_fault(void) __asm(__STRING(gsbase_load_fault)); void dump_add_page(vm_paddr_t); void dump_drop_page(vm_paddr_t); +void identify_cpu(void); void initializecpu(void); void initializecpucache(void); void fillw(int /*u_short*/ pat, void *base, size_t cnt); void fpstate_drop(struct thread *td); int is_physical_memory(vm_paddr_t addr); int isa_nmi(int cd); +void panicifcpuunsupported(void); void pagecopy(void *from, void *to); void pagezero(void *addr); +void printcpuinfo(void); void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int ist); int user_dbreg_trap(void); void minidumpsys(struct dumperinfo *); Modified: head/sys/i386/i386/identcpu.c ============================================================================== --- head/sys/i386/i386/identcpu.c Thu Sep 4 01:38:31 2014 (r271075) +++ head/sys/i386/i386/identcpu.c Thu Sep 4 01:46:06 2014 (r271076) @@ -64,30 +64,16 @@ __FBSDID("$FreeBSD$"); #define IDENTBLUE_IBMCPU 1 #define IDENTBLUE_CYRIXM2 2 -/* XXX - should be in header file: */ -void printcpuinfo(void); -void finishidentcpu(void); -void earlysetcpuclass(void); -#if defined(I586_CPU) && defined(CPU_WT_ALLOC) -void enable_K5_wt_alloc(void); -void enable_K6_wt_alloc(void); -void enable_K6_2_wt_alloc(void); -#endif -void panicifcpuunsupported(void); - static void identifycyrix(void); static void init_exthigh(void); static u_int find_cpu_vendor_id(void); static void print_AMD_info(void); static void print_INTEL_info(void); static void print_INTEL_TLB(u_int data); -static void print_AMD_assoc(int i); static void print_transmeta_info(void); static void print_via_padlock_info(void); int cpu_class; -u_int cpu_exthigh; /* Highest arg to extended CPUID */ -u_int cyrix_did; /* Device ID of Cyrix CPU */ char machine[] = MACHINE; SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "Machine class"); @@ -161,10 +147,6 @@ static struct { #endif }; -#if defined(I586_CPU) && !defined(NO_F00F_HACK) -int has_f00f_bug = 0; /* Initialized so that it can be patched. */ -#endif - static void init_exthigh(void) { Modified: head/sys/i386/i386/initcpu.c ============================================================================== --- head/sys/i386/i386/initcpu.c Thu Sep 4 01:38:31 2014 (r271075) +++ head/sys/i386/i386/initcpu.c Thu Sep 4 01:46:06 2014 (r271076) @@ -48,12 +48,6 @@ __FBSDID("$FreeBSD$"); #define CPU_ENABLE_SSE #endif -#if defined(I586_CPU) && defined(CPU_WT_ALLOC) -void enable_K5_wt_alloc(void); -void enable_K6_wt_alloc(void); -void enable_K6_2_wt_alloc(void); -#endif - #ifdef I486_CPU static void init_5x86(void); static void init_bluelightning(void); @@ -81,36 +75,36 @@ SYSCTL_INT(_hw, OID_AUTO, instruction_ss */ static int hw_clflush_disable = -1; -/* Must *NOT* be BSS or locore will bzero these after setting them */ -int cpu = 0; /* Are we 386, 386sx, 486, etc? */ -u_int cpu_feature = 0; /* Feature flags */ -u_int cpu_feature2 = 0; /* Feature flags */ -u_int amd_feature = 0; /* AMD feature flags */ -u_int amd_feature2 = 0; /* AMD feature flags */ -u_int amd_pminfo = 0; /* AMD advanced power management info */ -u_int via_feature_rng = 0; /* VIA RNG features */ -u_int via_feature_xcrypt = 0; /* VIA ACE features */ -u_int cpu_high = 0; /* Highest arg to CPUID */ -u_int cpu_id = 0; /* Stepping ID */ -u_int cpu_procinfo = 0; /* HyperThreading Info / Brand Index / CLFUSH */ -u_int cpu_procinfo2 = 0; /* Multicore info */ -char cpu_vendor[20] = ""; /* CPU Origin code */ -u_int cpu_vendor_id = 0; /* CPU vendor ID */ +int cpu; /* Are we 386, 386sx, 486, etc? */ +u_int cpu_feature; /* Feature flags */ +u_int cpu_feature2; /* Feature flags */ +u_int amd_feature; /* AMD feature flags */ +u_int amd_feature2; /* AMD feature flags */ +u_int amd_pminfo; /* AMD advanced power management info */ +u_int via_feature_rng; /* VIA RNG features */ +u_int via_feature_xcrypt; /* VIA ACE features */ +u_int cpu_high; /* Highest arg to CPUID */ +u_int cpu_exthigh; /* Highest arg to extended CPUID */ +u_int cpu_id; /* Stepping ID */ +u_int cpu_procinfo; /* HyperThreading Info / Brand Index / CLFUSH */ +u_int cpu_procinfo2; /* Multicore info */ +char cpu_vendor[20]; /* CPU Origin code */ +u_int cpu_vendor_id; /* CPU vendor ID */ +#ifdef CPU_ENABLE_SSE +u_int cpu_fxsr; /* SSE enabled */ +u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */ +#endif u_int cpu_clflush_line_size = 32; u_int cpu_mon_mwait_flags; /* MONITOR/MWAIT flags (CPUID.05H.ECX) */ u_int cpu_mon_min_size; /* MONITOR minimum range size, bytes */ u_int cpu_mon_max_size; /* MONITOR minimum range size, bytes */ +u_int cyrix_did; /* Device ID of Cyrix CPU */ SYSCTL_UINT(_hw, OID_AUTO, via_feature_rng, CTLFLAG_RD, &via_feature_rng, 0, "VIA RNG feature available in CPU"); SYSCTL_UINT(_hw, OID_AUTO, via_feature_xcrypt, CTLFLAG_RD, &via_feature_xcrypt, 0, "VIA xcrypt feature available in CPU"); -#ifdef CPU_ENABLE_SSE -u_int cpu_fxsr; /* SSE enabled */ -u_int cpu_mxcsr_mask; /* valid bits in mxcsr */ -#endif - #ifdef I486_CPU /* * IBM Blue Lightning Modified: head/sys/i386/i386/machdep.c ============================================================================== --- head/sys/i386/i386/machdep.c Thu Sep 4 01:38:31 2014 (r271075) +++ head/sys/i386/i386/machdep.c Thu Sep 4 01:46:06 2014 (r271076) @@ -180,10 +180,6 @@ CTASSERT(offsetof(struct pcpu, pc_curthr extern void init386(int first); extern void dblfault_handler(void); -extern void printcpuinfo(void); /* XXX header file */ -extern void finishidentcpu(void); -extern void panicifcpuunsupported(void); - #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) @@ -1665,10 +1661,6 @@ struct gate_descriptor *idt = &idt0[0]; struct region_descriptor r_gdt, r_idt; /* table descriptors */ struct mtx dt_lock; /* lock for GDT and LDT */ -#if defined(I586_CPU) && !defined(NO_F00F_HACK) -extern int has_f00f_bug; -#endif - static struct i386tss dblfault_tss; static char dblfault_stack[PAGE_SIZE]; Modified: head/sys/i386/i386/trap.c ============================================================================== --- head/sys/i386/i386/trap.c Thu Sep 4 01:38:31 2014 (r271075) +++ head/sys/i386/i386/trap.c Thu Sep 4 01:46:06 2014 (r271076) @@ -153,7 +153,7 @@ static char *trap_msg[] = { }; #if defined(I586_CPU) && !defined(NO_F00F_HACK) -extern int has_f00f_bug; +int has_f00f_bug = 0; /* Initialized so that it can be patched. */ #endif #ifdef KDB Modified: head/sys/i386/include/md_var.h ============================================================================== --- head/sys/i386/include/md_var.h Thu Sep 4 01:38:31 2014 (r271075) +++ head/sys/i386/include/md_var.h Thu Sep 4 01:46:06 2014 (r271076) @@ -56,10 +56,13 @@ extern u_int cpu_procinfo; extern u_int cpu_procinfo2; extern char cpu_vendor[]; extern u_int cpu_vendor_id; -extern u_int cyrix_did; extern u_int cpu_mon_mwait_flags; extern u_int cpu_mon_min_size; extern u_int cpu_mon_max_size; +extern u_int cyrix_did; +#if defined(I586_CPU) && !defined(NO_F00F_HACK) +extern int has_f00f_bug; +#endif extern char kstack[]; extern char sigcode[]; extern int szsigcode; @@ -94,15 +97,23 @@ void doreti_popl_fs(void) __asm(__STRING void doreti_popl_fs_fault(void) __asm(__STRING(doreti_popl_fs_fault)); void dump_add_page(vm_paddr_t); void dump_drop_page(vm_paddr_t); -void initializecpu(void); +void finishidentcpu(void); +#if defined(I586_CPU) && defined(CPU_WT_ALLOC) +void enable_K5_wt_alloc(void); +void enable_K6_wt_alloc(void); +void enable_K6_2_wt_alloc(void); +#endif void enable_sse(void); void fillw(int /*u_short*/ pat, void *base, size_t cnt); +void initializecpu(void); void i686_pagezero(void *addr); void sse2_pagezero(void *addr); void init_AMD_Elan_sc520(void); int is_physical_memory(vm_paddr_t addr); int isa_nmi(int cd); vm_paddr_t kvtop(void *addr); +void panicifcpuunsupported(void); +void printcpuinfo(void); void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int selec); int user_dbreg_trap(void); void minidumpsys(struct dumperinfo *); Modified: head/sys/pc98/pc98/machdep.c ============================================================================== --- head/sys/pc98/pc98/machdep.c Thu Sep 4 01:38:31 2014 (r271075) +++ head/sys/pc98/pc98/machdep.c Thu Sep 4 01:46:06 2014 (r271076) @@ -149,10 +149,6 @@ CTASSERT(offsetof(struct pcpu, pc_curthr extern void init386(int first); extern void dblfault_handler(void); -extern void printcpuinfo(void); /* XXX header file */ -extern void finishidentcpu(void); -extern void panicifcpuunsupported(void); - #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)