From nobody Wed Jul 24 19:44:09 2024 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4WTkwn5ZWTz5QKPQ; Wed, 24 Jul 2024 19:44:09 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R11" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4WTkwn53cnz4Vtb; Wed, 24 Jul 2024 19:44:09 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1721850249; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=DbS3jkG0L8XoCNCzi+8p2Ct1l4cvzpXktOT9S3XaZkI=; b=BnoQ/0IxTkEqg5yfBwHjow0QCWtC+t7Iz6GVNBViJj05qCch3vTemG0up7mYKfNbi2JPHp IdJf3G153XKP/tWgdMejXkmxa2HCoC8+WaMyg9zSScy8zJeVWSPWGXmCdiHP34XSB0rH7/ +0JmNfOx3TCt1UjOQTh9zXK7j3ZiYkwRSaWZWxpYOVofYifJ6DzcKZZ/Wie7qaGgZ3XCk1 OAi2qaB5K5yNHBdVls9nrzQ+bBx2IQf0LZc9Ola2jh6JK/sTO1iDr0Z/SQL5vgNjbp62xc JUyr9fsbFvHVKH0BhD42snGl6wR0BiQM/668Fk5QqA0fDdkRAfv8goqodCgsYg== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1721850249; a=rsa-sha256; cv=none; b=qVIpjw0iKbC9UBLDpkiysI/1tmzBmqp/qtJPZiqi40jKksQ74b9dCx4ujd0+zvciSf7Ltv AB1vKv6oKga0VA3qMzT45YXyUM1vKLJwX3DxmcN/IB0haqPWCslPAvR3oMm9somf1LC7lh 89fJt6gFZ8TRmXySXIcsOX4NJDE3zubhxTtoBmKwwU6bfvqKHAtKh71ktwUsSwOfRH/dcC 7lzSVTotmslCi2irouHOvJD47sHVzAzQHxKgwfHz4BnBuQy7WlH260Gtcav6aSy2eF/Goa B5lrE9c5kTYXSCFowJEfTjB+phZIdxleEdqxw1UNQfvT1w2bYzNG4iZn5ilDIQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1721850249; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=DbS3jkG0L8XoCNCzi+8p2Ct1l4cvzpXktOT9S3XaZkI=; b=Nd+radwFXSpF6wr2Wrb6MrJJ0zfajnWdQcFBG2+TldMIAGIgX/Y/bggWhaEZ2ouX70z9PA znwntOXfOVSfuhBR+Ug+FPKvrh85ufBOjFg+Ku1X23udP0zrVBz12SB9x0O7rNYUaNLLN/ Yh2YrnOB1FBHPOmWh1YUczWCaQ5dl44r7GVG/TnbPIdOpAp+NhwUzjpE8muja7zvfSTBeW IwuSDuFgo8wZjxJPnXwUCoIfOusSdtNZVWpvSx3nLwuZH1AcaNZkQW8F0YZETacYEz4AL8 NMEqF92QCXVx6jLTnERqSblSKnFXoe1t3w16VJRBUTNMlCx4FTvvM+BDgzML2Q== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4WTkwn4flWzPfM; Wed, 24 Jul 2024 19:44:09 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 46OJi9S1011146; Wed, 24 Jul 2024 19:44:09 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 46OJi92Z011143; Wed, 24 Jul 2024 19:44:09 GMT (envelope-from git) Date: Wed, 24 Jul 2024 19:44:09 GMT Message-Id: <202407241944.46OJi92Z011143@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Dimitry Andric Subject: git: 8d87e47b8d10 - stable/13 - Fix llvm register allocator for native/cross build differences List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: dim X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 8d87e47b8d1093a264ca954620b9e58b81fb9b34 Auto-Submitted: auto-generated The branch stable/13 has been updated by dim: URL: https://cgit.FreeBSD.org/src/commit/?id=8d87e47b8d1093a264ca954620b9e58b81fb9b34 commit 8d87e47b8d1093a264ca954620b9e58b81fb9b34 Author: Dimitry Andric AuthorDate: 2024-07-21 20:37:27 +0000 Commit: Dimitry Andric CommitDate: 2024-07-24 19:26:11 +0000 Fix llvm register allocator for native/cross build differences Work around an issue in LLVM's register allocator, which can cause slightly different i386 object files, when produced by a native or cross build of clang. This adds another volatile qualifier to a float variable declaration in the weightCalcHelper() function, which otherwise produces slightly different float results on amd64 and i386 hosts. In turn, this can lead to different (but equivalent) register choices, and thus non-identical assembly code. See https://github.com/llvm/llvm-project/issues/99396 for more details. Note this is a temporary fix, meant to merge in time for 13.4. As soon as upstream has a permanent solution we will import that. PR: 276961 Reported by: cperciva MFC after: 3 days (cherry picked from commit 397c2693fa66508cb5e6b173650a1f3bc6c4dd4f) --- contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp b/contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp index f3cb7fa5af61..afde8d001f88 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp @@ -256,7 +256,12 @@ float VirtRegAuxInfo::weightCalcHelper(LiveInterval &LI, SlotIndex *Start, return -1.0f; } - float Weight = 1.0f; + // FreeBSD customization: similar to the HWeight declaration below, add a + // volatile qualifier to avoid slightly different weight results on amd64 + // and i386 hosts, and possibly choosing different registers in the register + // allocator. See for + // more details. + volatile float Weight = 1.0f; if (IsSpillable) { // Get loop info for mi. if (MI->getParent() != MBB) {