Date: Sat, 11 Nov 2006 10:10:51 +0900 From: Pyun YongHyeon <pyunyh@gmail.com> To: freebsd-current@freebsd.org Subject: Call for re(4) TSO/VLAN testers Message-ID: <20061111011051.GB5233@cdnetworks.co.kr>
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Hi,
Attached patch adds TSO support code to re(4) and fixes several
nits in re(4).
o TSO support.
o Correctly set IFCAP_VLAN_HWCSUM as re(4) can do VLAN
tagging/checksum offloading in hardware.
o Correctly set media header length for VLAN.
o Don't set RL_CFG1_FULLDUPLEX bit. The RL_CFG1_FULLDUPLEX bit in
config register 1 is only valid on 8129.
o Alignment fixup code is required on strict-alignment architectures.
Use __NO_STRICT_ALIGNMENT to determine whether the fixup is
required.
With TSO you can see reduced system load while large file transfers
is in progress. Please test the patch and report any unusual things
you've found.
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Regards,
Pyun YongHyeon
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Index: if_rlreg.h
===================================================================
RCS file: /pool/ncvs/src/sys/pci/if_rlreg.h,v
retrieving revision 1.60
diff -u -r1.60 if_rlreg.h
--- if_rlreg.h 1 Aug 2006 17:18:25 -0000 1.60
+++ if_rlreg.h 11 Nov 2006 00:45:59 -0000
@@ -541,6 +541,7 @@
#define RL_TDESC_CMD_UDPCSUM 0x00020000 /* UDP checksum enable */
#define RL_TDESC_CMD_IPCSUM 0x00040000 /* IP header checksum enable */
#define RL_TDESC_CMD_MSSVAL 0x07FF0000 /* Large send MSS value */
+#define RL_TDESC_CMD_MSSVAL_SHIFT 16 /* Large send MSS value shift */
#define RL_TDESC_CMD_LGSEND 0x08000000 /* TCP large send enb */
#define RL_TDESC_CMD_EOF 0x10000000 /* end of frame marker */
#define RL_TDESC_CMD_SOF 0x20000000 /* start of frame marker */
@@ -637,7 +638,7 @@
* due to the 8139C+. We need to put the number of descriptors in the ring
* structure and use that value instead.
*/
-#if !defined(__i386__) && !defined(__amd64__)
+#ifndef __NO_STRICT_ALIGNMENT
#define RE_FIXUP_RX 1
#endif
Index: if_re.c
===================================================================
RCS file: /pool/ncvs/src/sys/dev/re/if_re.c,v
retrieving revision 1.75
diff -u -r1.75 if_re.c
--- if_re.c 17 Sep 2006 13:33:28 -0000 1.75
+++ if_re.c 11 Nov 2006 00:46:15 -0000
@@ -1257,10 +1257,9 @@
ifp->if_mtu = ETHERMTU;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
ifp->if_ioctl = re_ioctl;
- ifp->if_capabilities = IFCAP_VLAN_MTU;
ifp->if_start = re_start;
- ifp->if_hwassist = RE_CSUM_FEATURES;
- ifp->if_capabilities |= IFCAP_HWCSUM|IFCAP_VLAN_HWTAGGING;
+ ifp->if_hwassist = RE_CSUM_FEATURES | CSUM_TSO;
+ ifp->if_capabilities = IFCAP_HWCSUM | IFCAP_TSO4;
ifp->if_capenable = ifp->if_capabilities;
#ifdef DEVICE_POLLING
ifp->if_capabilities |= IFCAP_POLLING;
@@ -1279,6 +1278,19 @@
*/
ether_ifattach(ifp, eaddr);
+ /* VLAN capability setup */
+ ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING;
+ if (ifp->if_capabilities & IFCAP_HWCSUM)
+ ifp->if_capabilities |= IFCAP_VLAN_HWCSUM;
+ ifp->if_capenable = ifp->if_capabilities;
+
+ /*
+ * Tell the upper layer(s) we support long frames.
+ * Must appear after the call to ether_ifattach() because
+ * ether_ifattach() sets ifi_hdrlen to the default value.
+ */
+ ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
+
#ifdef RE_DIAG
/*
* Perform hardware diagnostic on the original RTL8169.
@@ -2020,13 +2032,18 @@
*/
arg.rl_flags = 0;
-
- if ((*m_head)->m_pkthdr.csum_flags & CSUM_IP)
- arg.rl_flags |= RL_TDESC_CMD_IPCSUM;
- if ((*m_head)->m_pkthdr.csum_flags & CSUM_TCP)
- arg.rl_flags |= RL_TDESC_CMD_TCPCSUM;
- if ((*m_head)->m_pkthdr.csum_flags & CSUM_UDP)
- arg.rl_flags |= RL_TDESC_CMD_UDPCSUM;
+ if (((*m_head)->m_pkthdr.csum_flags & CSUM_TSO) != 0)
+ arg.rl_flags = RL_TDESC_CMD_LGSEND |
+ ((uint32_t)(*m_head)->m_pkthdr.tso_segsz <<
+ RL_TDESC_CMD_MSSVAL_SHIFT);
+ else {
+ if ((*m_head)->m_pkthdr.csum_flags & CSUM_IP)
+ arg.rl_flags |= RL_TDESC_CMD_IPCSUM;
+ if ((*m_head)->m_pkthdr.csum_flags & CSUM_TCP)
+ arg.rl_flags |= RL_TDESC_CMD_TCPCSUM;
+ if ((*m_head)->m_pkthdr.csum_flags & CSUM_UDP)
+ arg.rl_flags |= RL_TDESC_CMD_UDPCSUM;
+ }
arg.sc = sc;
arg.rl_idx = *idx;
@@ -2411,7 +2428,7 @@
mii_mediachg(mii);
- CSR_WRITE_1(sc, RL_CFG1, RL_CFG1_DRVLOAD|RL_CFG1_FULLDUPLEX);
+ CSR_WRITE_1(sc, RL_CFG1, CSR_READ_1(sc, RL_CFG1) | RL_CFG1_DRVLOAD);
ifp->if_drv_flags |= IFF_DRV_RUNNING;
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
@@ -2531,17 +2548,26 @@
if (mask & IFCAP_HWCSUM) {
ifp->if_capenable ^= IFCAP_HWCSUM;
if (ifp->if_capenable & IFCAP_TXCSUM)
- ifp->if_hwassist = RE_CSUM_FEATURES;
+ ifp->if_hwassist |= RE_CSUM_FEATURES;
else
- ifp->if_hwassist = 0;
+ ifp->if_hwassist &= ~RE_CSUM_FEATURES;
reinit = 1;
}
if (mask & IFCAP_VLAN_HWTAGGING) {
ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
reinit = 1;
}
+ if (mask & IFCAP_TSO4) {
+ ifp->if_capenable ^= IFCAP_TSO4;
+ if ((IFCAP_TSO4 & ifp->if_capenable) != 0 &&
+ (IFCAP_TSO4 & ifp->if_capabilities) != 0)
+ ifp->if_hwassist |= CSUM_TSO;
+ else
+ ifp->if_hwassist &= ~CSUM_TSO;
+ }
if (reinit && ifp->if_drv_flags & IFF_DRV_RUNNING)
re_init(sc);
+ VLAN_CAPABILITIES(ifp);
}
break;
default:
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