Date: Tue, 19 Mar 2013 12:39:49 -0700 From: Adrian Chadd <adrian@freebsd.org> To: freebsd-wireless@freebsd.org Subject: update - better EDMA RX support, testing AR9580 Message-ID: <CAJ-Vmo=UZDCb%2BeSRLO5fiJQNJkzVYqjcy4zWNc70CBePQyKGjw@mail.gmail.com>
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Hi all, I've just committed some new RX handling code. Since the RX FIFO on the AR9380 and later chips is very shallow (128 entries), you have to refill the FIFO much quicker than you can handle frames. So instead of doing it in the RX task (which is shared with the TX completion task and runs at a lower priority than interrupt handling) - I'm now completing buffers and refilling the FIFO in the interrupt thread. I'm then doing the RX frame handling in the deferred path. This way the RX path (and most other things!) will be preempted by the interrupt thread if there's more RX frames to handle, and those will just be pushed into the RX queue. I've tested this with TCP iperf on a 2x2 setup and I now don't get any FIFO full errors. So I'd appreciate it if people would update to today's -HEAD and try it out. Thanks! Adrian
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