From owner-svn-src-head@freebsd.org Wed Nov 8 01:28:00 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id CB166E6A135; Wed, 8 Nov 2017 01:28:00 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [96.47.72.37]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id A4E197EAFF; Wed, 8 Nov 2017 01:28:00 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id vA81Qipp081578; Wed, 8 Nov 2017 01:26:44 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id vA81QiQF081576; Wed, 8 Nov 2017 01:26:44 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201711080126.vA81QiQF081576@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Wed, 8 Nov 2017 01:26:44 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r325526 - in head/sys/powerpc: include powerpc X-SVN-Group: head X-SVN-Commit-Author: jhibbits X-SVN-Commit-Paths: in head/sys/powerpc: include powerpc X-SVN-Commit-Revision: 325526 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Nov 2017 01:28:00 -0000 Author: jhibbits Date: Wed Nov 8 01:26:44 2017 New Revision: 325526 URL: https://svnweb.freebsd.org/changeset/base/325526 Log: Add the ISEL feature macro for those powerpc cores that have it This is mostly for completeness, we don't currently use it for anything else. Modified: head/sys/powerpc/include/cpu.h head/sys/powerpc/powerpc/cpu.c Modified: head/sys/powerpc/include/cpu.h ============================================================================== --- head/sys/powerpc/include/cpu.h Wed Nov 8 01:23:37 2017 (r325525) +++ head/sys/powerpc/include/cpu.h Wed Nov 8 01:26:44 2017 (r325526) @@ -68,6 +68,7 @@ extern int cpu_features2; #define PPC_FEATURE2_ARCH_2_07 0x80000000 #define PPC_FEATURE2_HAS_HTM 0x40000000 +#define PPC_FEATURE2_ISEL 0x08000000 #define PPC_FEATURE2_HAS_VCRYPTO 0x02000000 #define PPC_FEATURE_BITMASK \ @@ -77,7 +78,7 @@ extern int cpu_features2; "\011ARCH206\010VSX" #define PPC_FEATURE2_BITMASK \ "\20" \ - "\040ARCH207\037HTM\032VCRYPTO" + "\040ARCH207\037HTM\034ISEL\032VCRYPTO" #define TRAPF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0) #define TRAPF_PC(frame) ((frame)->srr0) Modified: head/sys/powerpc/powerpc/cpu.c ============================================================================== --- head/sys/powerpc/powerpc/cpu.c Wed Nov 8 01:23:37 2017 (r325525) +++ head/sys/powerpc/powerpc/cpu.c Wed Nov 8 01:26:44 2017 (r325526) @@ -153,13 +153,13 @@ static const struct cputab models[] = { PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX, - PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HAS_HTM | + PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HAS_HTM | PPC_FEATURE2_ISEL | PPC_FEATURE2_HAS_VCRYPTO, NULL }, { "IBM POWER8", IBMPOWER8, REVFMT_MAJMIN, PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX, - PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HAS_HTM | + PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HAS_HTM | PPC_FEATURE2_ISEL | PPC_FEATURE2_HAS_VCRYPTO, NULL }, { "Motorola PowerPC 7400", MPC7400, REVFMT_MAJMIN, PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, @@ -181,19 +181,20 @@ static const struct cputab models[] = { PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, { "Freescale e500v1 core", FSL_E500v1, REVFMT_MAJMIN, PPC_FEATURE_BOOKE | PPC_FEATURE_HAS_SPE | PPC_FEATURE_HAS_EFP_SINGLE, - 0, cpu_booke_setup }, + PPC_FEATURE2_ISEL, cpu_booke_setup }, { "Freescale e500v2 core", FSL_E500v2, REVFMT_MAJMIN, PPC_FEATURE_BOOKE | PPC_FEATURE_HAS_SPE | - PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE, 0, - cpu_booke_setup }, + PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE, + PPC_FEATURE2_ISEL, cpu_booke_setup }, { "Freescale e500mc core", FSL_E500mc, REVFMT_MAJMIN, - PPC_FEATURE_BOOKE | PPC_FEATURE_HAS_FPU, 0, cpu_booke_setup }, - { "Freescale e5500 core", FSL_E5500, REVFMT_MAJMIN, - PPC_FEATURE_BOOKE | PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU, 0, + PPC_FEATURE_BOOKE | PPC_FEATURE_HAS_FPU, PPC_FEATURE2_ISEL, cpu_booke_setup }, + { "Freescale e5500 core", FSL_E5500, REVFMT_MAJMIN, + PPC_FEATURE_BOOKE | PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU, + PPC_FEATURE2_ISEL, cpu_booke_setup }, { "Freescale e6500 core", FSL_E6500, REVFMT_MAJMIN, PPC_FEATURE_BOOKE | PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | - PPC_FEATURE_HAS_FPU, 0, cpu_booke_setup }, + PPC_FEATURE_HAS_FPU, PPC_FEATURE2_ISEL, cpu_booke_setup }, { "IBM Cell Broadband Engine", IBMCELLBE, REVFMT_MAJMIN, PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | PPC_FEATURE_SMT, 0, NULL},