From owner-svn-src-head@freebsd.org Mon Feb 6 17:20:38 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id A0911CD30F8; Mon, 6 Feb 2017 17:20:38 +0000 (UTC) (envelope-from kib@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 7B62F1381; Mon, 6 Feb 2017 17:20:38 +0000 (UTC) (envelope-from kib@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v16HKbtM072190; Mon, 6 Feb 2017 17:20:37 GMT (envelope-from kib@FreeBSD.org) Received: (from kib@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v16HKbD3072188; Mon, 6 Feb 2017 17:20:37 GMT (envelope-from kib@FreeBSD.org) Message-Id: <201702061720.v16HKbD3072188@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: kib set sender to kib@FreeBSD.org using -f From: Konstantin Belousov Date: Mon, 6 Feb 2017 17:20:37 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r313345 - in head/sys: arm/include arm64/include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Feb 2017 17:20:38 -0000 Author: kib Date: Mon Feb 6 17:20:37 2017 New Revision: 313345 URL: https://svnweb.freebsd.org/changeset/base/313345 Log: Update arm and arm64 counters MD bits. On arm64 use atomics. Then, both arm and arm64 do not need a critical section around update. Replace all cpus loop by CPU_FOREACH(). This brings arm and arm64 counter(9) implementation closer to current amd64, but being more RISC-y, arm* version cannot avoid atomics. Reported by: Alexandre Martins Reviewed by: andrew Tested by: Alexandre Martins, andrew Sponsored by: The FreeBSD Foundation MFC after: 2 weeks Modified: head/sys/arm/include/counter.h head/sys/arm64/include/counter.h Modified: head/sys/arm/include/counter.h ============================================================================== --- head/sys/arm/include/counter.h Mon Feb 6 15:24:52 2017 (r313344) +++ head/sys/arm/include/counter.h Mon Feb 6 17:20:37 2017 (r313345) @@ -31,12 +31,9 @@ #include #include -#ifdef INVARIANTS -#include -#endif -#define counter_enter() critical_enter() -#define counter_exit() critical_exit() +#define counter_enter() do {} while (0) +#define counter_exit() do {} while (0) #ifdef IN_SUBR_COUNTER_C @@ -55,7 +52,7 @@ counter_u64_fetch_inline(uint64_t *p) int i; r = 0; - for (i = 0; i < mp_ncpus; i++) + CPU_FOREACH(i) r += counter_u64_read_one((uint64_t *)p, i); return (r); @@ -78,18 +75,13 @@ counter_u64_zero_inline(counter_u64_t c) } #endif -#define counter_u64_add_protected(c, inc) do { \ - CRITICAL_ASSERT(curthread); \ - atomic_add_64((uint64_t *)zpcpu_get(c), (inc)); \ -} while (0) +#define counter_u64_add_protected(c, inc) counter_u64_add(c, inc) static inline void counter_u64_add(counter_u64_t c, int64_t inc) { - counter_enter(); - counter_u64_add_protected(c, inc); - counter_exit(); + atomic_add_64((uint64_t *)zpcpu_get(c), inc); } #endif /* ! __MACHINE_COUNTER_H__ */ Modified: head/sys/arm64/include/counter.h ============================================================================== --- head/sys/arm64/include/counter.h Mon Feb 6 15:24:52 2017 (r313344) +++ head/sys/arm64/include/counter.h Mon Feb 6 17:20:37 2017 (r313345) @@ -30,12 +30,10 @@ #define _MACHINE_COUNTER_H_ #include -#ifdef INVARIANTS -#include -#endif +#include -#define counter_enter() critical_enter() -#define counter_exit() critical_exit() +#define counter_enter() do {} while (0) +#define counter_exit() do {} while (0) #ifdef IN_SUBR_COUNTER_C static inline uint64_t @@ -52,13 +50,12 @@ counter_u64_fetch_inline(uint64_t *p) int i; r = 0; - for (i = 0; i < mp_ncpus; i++) + CPU_FOREACH(i) r += counter_u64_read_one((uint64_t *)p, i); return (r); } -/* XXXKIB might interrupt increment */ static void counter_u64_zero_one_cpu(void *arg) { @@ -76,18 +73,13 @@ counter_u64_zero_inline(counter_u64_t c) } #endif -#define counter_u64_add_protected(c, inc) do { \ - CRITICAL_ASSERT(curthread); \ - *(uint64_t *)zpcpu_get(c) += (inc); \ -} while (0) +#define counter_u64_add_protected(c, inc) counter_u64_add(c, inc) static inline void counter_u64_add(counter_u64_t c, int64_t inc) { - counter_enter(); - counter_u64_add_protected(c, inc); - counter_exit(); + atomic_add_64((uint64_t *)zpcpu_get(c), inc); } #endif /* ! _MACHINE_COUNTER_H_ */