From owner-freebsd-hackers@FreeBSD.ORG Fri Jan 11 03:40:11 2008 Return-Path: Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8487C16A41A for ; Fri, 11 Jan 2008 03:40:11 +0000 (UTC) (envelope-from john.giacomoni@colorado.edu) Received: from suburban.colorado.edu (suburban.colorado.edu [128.138.189.14]) by mx1.freebsd.org (Postfix) with ESMTP id 5E08F13C469 for ; Fri, 11 Jan 2008 03:40:11 +0000 (UTC) (envelope-from john.giacomoni@colorado.edu) Received: from localhost (suburban.colorado.edu [127.0.0.1]) by suburban.colorado.edu (8.13.1/8.13.1) with ESMTP id m0ANmTOr004538 for ; Thu, 10 Jan 2008 18:48:29 -0500 Message-Id: From: John Giacomoni To: freebsd-hackers@freebsd.org Content-Type: multipart/mixed; boundary=Apple-Mail-347-521328921 Mime-Version: 1.0 (Apple Message framework v915) Date: Thu, 10 Jan 2008 19:42:24 -0700 X-Mailer: Apple Mail (2.915) X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Subject: Running without clock interrupts? X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 11 Jan 2008 03:40:11 -0000 --Apple-Mail-347-521328921 Content-Type: text/plain; charset=US-ASCII; format=flowed; delsp=yes Content-Transfer-Encoding: 7bit I'd like to run a long loop with a minimum of interrupts, specifically without any scheduler or timer interrupts, the introduced jitter is noticeable. Is this possible in FreeBSD 7? If so how should I proceed? I can take as long as I need after the loop has completed to restore/ reinitialize any necessary state. I do want to be able to process other interrupts to handle page faults and the like. I'm working on dual core dual processor amd opteron setups right now and would like to support the intel family processors as well. It seems that what I want to do is to disable/mask acpi timer interrupts for the processor but trying to read the 0xfee00320 register (lvt_timer) causes a panic. Alternatively, I could hook in the timer handler to return immediately when a flag is set, though this still might introduce more jitter than I'd like. Thanks, John Giacomoni -- John.Giacomoni@colorado.edu University of Colorado at Boulder Department of Computer Science Engineering Center, ECCR 1B50 430 UCB Boulder, CO 80303-0430 USA --Apple-Mail-347-521328921 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit --Apple-Mail-347-521328921--