From owner-p4-projects@FreeBSD.ORG Mon Jul 14 13:16:19 2003 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id A6D3D37B404; Mon, 14 Jul 2003 13:16:18 -0700 (PDT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 576AB37B401; Mon, 14 Jul 2003 13:16:18 -0700 (PDT) Received: from canning.wemm.org (canning.wemm.org [192.203.228.65]) by mx1.FreeBSD.org (Postfix) with ESMTP id D73AB43F75; Mon, 14 Jul 2003 13:16:17 -0700 (PDT) (envelope-from peter@wemm.org) Received: from wemm.org (localhost [127.0.0.1]) by canning.wemm.org (Postfix) with ESMTP id C3DF12A7EA; Mon, 14 Jul 2003 13:16:17 -0700 (PDT) (envelope-from peter@wemm.org) X-Mailer: exmh version 2.5 07/13/2001 with nmh-1.0.4 To: Eric Anholt In-Reply-To: <1058006399.1464.52.camel@leguin> Date: Mon, 14 Jul 2003 13:16:17 -0700 From: Peter Wemm Message-Id: <20030714201617.C3DF12A7EA@canning.wemm.org> cc: Perforce Change Reviews cc: John Baldwin Subject: Re: PERFORCE change 33663 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Jul 2003 20:16:19 -0000 Eric Anholt wrote: > On Thu, 2003-06-26 at 10:57, John Baldwin wrote: > > On 25-Jun-2003 Peter Wemm wrote: > > > http://perforce.freebsd.org/chv.cgi?CH=33663 > > > > > > Change 33663 by peter@peter_hammer on 2003/06/25 15:05:09 > > > > > > Port sym to amd64 > > > > This is possibly not correct. Do all hammer's support the P3+ > > SFENCE and related instructions? Even i386 should probably be > > using what bus_space_barrier() uses. Heck, sym should probably > > just be using bus_space_barrier anyways. > > It would sure be nice to have an MI call for the bus_space_barrier() > calls that don't need a bus_space_tag. The DRM unfortunately doesn't > (and won't ever, I think) do bus_space, so we have to have > platform-specific ifdefs for read, write, and read/write barriers. Yes, it has the *FENCE instructions, but it still has the same memory ordering semantics. *FENCE has most effect on the SSE/SSE2 instructions, not so much the regular x86* instruction stream, unless MTRR/PAT are in the middle of things as well. This is usually not the case for things like disk IO.. Cheers, -Peter -- Peter Wemm - peter@wemm.org; peter@FreeBSD.org; peter@yahoo-inc.com "All of this is for nothing if we don't go to the stars" - JMS/B5