Date: Thu, 04 Jul 1996 17:11:47 -0700 From: erich@uruk.org To: Terry Lambert <terry@lambert.org> Cc: freebsd-smp@freebsd.org Subject: Re: Running SMP Message-ID: <199607050011.RAA12069@uruk.org> In-Reply-To: Your message of "Thu, 04 Jul 1996 13:13:28 PDT." <199607042013.NAA13471@phaeton.artisoft.com>
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Terry Lambert <terry@lambert.org> writes: ... > This is quite broken, and it should be ovious from the original patches I > sent you that this is an attempt to preserve cache locality (the Jack > Vogel patches lost cache locality by anonymously scheduling processes > without regard to "preferred processor"). > > Any input you have on how to correct this would be welcome; I've beem > dealing with Lite2 integration and porting issues, and wanted to > ignore the scheduler and page mapping if I could. 8-). The order which I was going to try to fix things was: -- startup code -- generalization to more than 2 CPUs -- scheduler I could munge the scheduler first easy enough. More on this later. It's still important to get the details on FreeBSD-SMP's model of how it uses the x86 data structures such as the TSS. Getting an accurate image of this is particularly important to how the > 2 CPU generalization goes (i.e. what static data is really necessary here... allocating something upwards of 64K per CPU statically at compile-time would be very annoying). I still haven't looked through that part yet, admittedly. Linux-SMP has one GDT with one TSS per process, simply guaranteeing that no more than one processor will access any particular TSS at a time. Could someone comment on how FreeBSD currently does this in more detail ? -- Erich Stefan Boleyn \_ E-mail (preferred): <erich@uruk.org> Mad Genius wanna-be, CyberMuffin \__ (finger me for other stats) Web: http://www.uruk.org/~erich/ Motto: "I'll live forever or die trying" This is my home system, so I'm speaking only for myself, not for Intel.
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