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From: Warner Losh <imp@FreeBSD.org>
To: Perforce Change Reviews <perforce@freebsd.org>
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Subject: PERFORCE change 89318 for review
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http://perforce.freebsd.org/chv.cgi?CH=89318

Change 89318 by imp@imp_hammer on 2006/01/07 04:04:47

	Move the ST register definitions into at91streg.h

Affected files ...

.. //depot/projects/arm/src/sys/arm/at91/at91rm92reg.h#12 edit
.. //depot/projects/arm/src/sys/arm/at91/at91streg.h#1 add

Differences ...

==== //depot/projects/arm/src/sys/arm/at91/at91rm92reg.h#12 (text+ko) ====

@@ -270,25 +270,6 @@
 #define AT91RM92_ST_BASE	0xffffd00
 #define AT91RM92_ST_SIZE	0x100
 
-#define ST_CR		0x00 /* Control register */
-#define ST_CR_WDRST	(1U << 0) /* WDRST: Watchdog Timer Restart */
-#define ST_PIMR		0x04 /* Period interval mode register */
-#define ST_WDMR		0x08 /* Watchdog mode register */
-#define ST_WDMR_EXTEN	(1U << 17) /* EXTEN: External Signal Assert Enable */
-#define ST_WDMR_RSTEN	(1U << 16) /* RSTEN: Reset Enable */
-#define ST_RTMR		0x0c /* Real-time mode register */
-#define ST_SR		0x10 /* Status register */
-#define ST_SR_PITS	(1U << 0) /* PITS: Period Interval Timer Status */
-#define ST_SR_WDOVF	(1U << 1) /* WDOVF: Watchdog Overflow */
-#define ST_SR_RTTINC	(1U << 2) /* RTTINC: Real-time Timer Increment */
-#define ST_SR_ALMS	(1U << 3) /* ALMS: Alarm Status */
-#define ST_IER		0x14 /* Interrupt enable register */
-#define ST_IDR		0x18 /* Interrupt disable register */
-#define ST_IMR		0x1c /* Interrupt mask register */
-#define ST_RTAR		0x20 /* Real-time alarm register */
-#define	ST_CRTR		0x24 /* Current real-time register */
-#define ST_CRTR_MASK	0xfffff /* 20-bit counter */
-
 #define AT91RM92_SPI_BASE	0xffe0000
 #define AT91RM92_SPI_SIZE	0x4000
 #define AT91RM92_SPI_PDC	0xffe0100