From owner-svn-src-all@freebsd.org Wed Apr 3 13:19:48 2019 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id EDB67156DD94; Wed, 3 Apr 2019 13:19:47 +0000 (UTC) (envelope-from emaste@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 944B580C7D; Wed, 3 Apr 2019 13:19:47 +0000 (UTC) (envelope-from emaste@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 6DB6CE68C; Wed, 3 Apr 2019 13:19:47 +0000 (UTC) (envelope-from emaste@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x33DJlQH037156; Wed, 3 Apr 2019 13:19:47 GMT (envelope-from emaste@FreeBSD.org) Received: (from emaste@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x33DJldD037155; Wed, 3 Apr 2019 13:19:47 GMT (envelope-from emaste@FreeBSD.org) Message-Id: <201904031319.x33DJldD037155@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: emaste set sender to emaste@FreeBSD.org using -f From: Ed Maste Date: Wed, 3 Apr 2019 13:19:47 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r345844 - stable/12/sys/arm/arm X-SVN-Group: stable-12 X-SVN-Commit-Author: emaste X-SVN-Commit-Paths: stable/12/sys/arm/arm X-SVN-Commit-Revision: 345844 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 944B580C7D X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-2.95 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_MEDIUM(-1.00)[-0.999,0]; NEURAL_HAM_LONG(-1.00)[-1.000,0]; NEURAL_HAM_SHORT(-0.95)[-0.952,0]; ASN(0.00)[asn:11403, ipnet:2610:1c1:1::/48, country:US] X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Apr 2019 13:19:48 -0000 Author: emaste Date: Wed Apr 3 13:19:47 2019 New Revision: 345844 URL: https://svnweb.freebsd.org/changeset/base/345844 Log: MFC r343764 (jchandra): arm, acpi: increase size of memory region arrays Bump up MAX_HWCNT and MAX_EXCNT to 32 when ACPI is enabled. These are the sizes of the hwregions and exregions arrays respectively. ACPI firmware typically has more memory regions and the current value of 16 is not sufficient for some platforms. This commit fixes a failure seen with AMI firmware on Cavium's Sabre ThunderX2 reference platform. This platform needs 21 physical memory regions and 18 excluded regions to boot correctly with the current firmware release. Modified: stable/12/sys/arm/arm/physmem.c Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/arm/arm/physmem.c ============================================================================== --- stable/12/sys/arm/arm/physmem.c Wed Apr 3 12:47:49 2019 (r345843) +++ stable/12/sys/arm/arm/physmem.c Wed Apr 3 13:19:47 2019 (r345844) @@ -29,6 +29,7 @@ #include __FBSDID("$FreeBSD$"); +#include "opt_acpi.h" #include "opt_ddb.h" /* @@ -48,8 +49,13 @@ __FBSDID("$FreeBSD$"); * that can be allocated, or both, depending on the exclusion flags associated * with the region. */ +#ifdef DEV_ACPI +#define MAX_HWCNT 32 /* ACPI needs more regions */ +#define MAX_EXCNT 32 +#else #define MAX_HWCNT 16 #define MAX_EXCNT 16 +#endif #if defined(__arm__) #define MAX_PHYS_ADDR 0xFFFFFFFFull