From owner-svn-src-all@FreeBSD.ORG Tue Apr 10 00:04:05 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 191781065672; Tue, 10 Apr 2012 00:04:05 +0000 (UTC) (envelope-from asmrookie@gmail.com) Received: from mail-lb0-f182.google.com (mail-lb0-f182.google.com [209.85.217.182]) by mx1.freebsd.org (Postfix) with ESMTP id DEBAB8FC12; Tue, 10 Apr 2012 00:04:03 +0000 (UTC) Received: by lbbgj3 with SMTP id gj3so237922lbb.13 for ; Mon, 09 Apr 2012 17:03:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=P4moq2eu7AhRFwrUjAuy4IC2cq2Pct9Dibr9kGM95MY=; b=IqJaOWS2uCGhrETfIbdNfyhO6KHykB7PnRgOg3cyr6QqLu3fp84Qr7kiTduzt7M+Oq FahbiXXHLaTsCukk/BpnTYqKAwgklSAiPKCIByidsfRcLh0znTkAJgaGc0mzzyBlnf1v vMjhEom+//a1WXdCuyraorb11XV0WkQBky4drmfVDJa5PKVTHEpZeS59OkG9h6Rz34CA 4+wgnPwq8arCLe/ggGdBFSgibgZeNYNWMfQuHfxxwXql5WSe8hrZYt2SIy2VsIudbdBs aE0lvi6BIk9QfQVVAwseyuY9+DgRTvyH0qO5ZkK2e72BtrDc8SlBS3VKn3BEqTYgaZo7 2INw== MIME-Version: 1.0 Received: by 10.112.24.103 with SMTP id t7mr456544lbf.22.1334016236656; Mon, 09 Apr 2012 17:03:56 -0700 (PDT) Sender: asmrookie@gmail.com Received: by 10.112.93.138 with HTTP; Mon, 9 Apr 2012 17:03:56 -0700 (PDT) In-Reply-To: <20120409230949.GB68111@alchemy.franken.de> References: <201204092241.q39MfJZn081610@svn.freebsd.org> <20120409230949.GB68111@alchemy.franken.de> Date: Tue, 10 Apr 2012 01:03:56 +0100 X-Google-Sender-Auth: 8YfJ1fH7Q9XRbERoe0V_IE-cSpY Message-ID: From: Attilio Rao To: Marius Strobl , John Baldwin Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r234074 - in head/sys: amd64/amd64 i386/i386 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Apr 2012 00:04:05 -0000 Il 10 aprile 2012 00:09, Marius Strobl ha scrit= to: > On Mon, Apr 09, 2012 at 10:41:19PM +0000, Attilio Rao wrote: >> Author: attilio >> Date: Mon Apr =C2=A09 22:41:19 2012 >> New Revision: 234074 >> URL: http://svn.freebsd.org/changeset/base/234074 >> >> Log: >> =C2=A0 BSP is not added to the mask of valid target CPUs for interrupts >> =C2=A0 in set_apic_interrupt_ids(). Besides, set_apic_interrupts_ids() i= s not >> =C2=A0 called in the !SMP case too. >> =C2=A0 Fix this by: >> =C2=A0 - Adding the BSP as an interrupt target directly in cpu_startup()= . >> =C2=A0 - Remove an obsolete optimization where the BSP are skipped in >> =C2=A0 =C2=A0 set_apic_interrupt_ids(). >> >> =C2=A0 Reported by: =C2=A0 =C2=A0 =C2=A0 =C2=A0jh >> =C2=A0 Reviewed by: =C2=A0 =C2=A0 =C2=A0 =C2=A0jhb >> =C2=A0 MFC after: =C2=A03 days >> =C2=A0 X-MFC: =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0r233961 >> =C2=A0 Pointy hat to: =C2=A0 =C2=A0 =C2=A0me >> >> Modified: >> =C2=A0 head/sys/amd64/amd64/machdep.c >> =C2=A0 head/sys/amd64/amd64/mp_machdep.c >> =C2=A0 head/sys/i386/i386/machdep.c >> =C2=A0 head/sys/i386/i386/mp_machdep.c >> >> Modified: head/sys/amd64/amd64/machdep.c >> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D >> --- head/sys/amd64/amd64/machdep.c =C2=A0 =C2=A0Mon Apr =C2=A09 22:01:43= 2012 =C2=A0 =C2=A0 =C2=A0 =C2=A0(r234073) >> +++ head/sys/amd64/amd64/machdep.c =C2=A0 =C2=A0Mon Apr =C2=A09 22:41:19= 2012 =C2=A0 =C2=A0 =C2=A0 =C2=A0(r234074) >> @@ -295,6 +295,11 @@ cpu_startup(dummy) >> =C2=A0 =C2=A0 =C2=A0 vm_pager_bufferinit(); >> >> =C2=A0 =C2=A0 =C2=A0 cpu_setregs(); >> + >> + =C2=A0 =C2=A0 /* >> + =C2=A0 =C2=A0 =C2=A0* Add BSP as an interrupt target. >> + =C2=A0 =C2=A0 =C2=A0*/ >> + =C2=A0 =C2=A0 intr_add_cpu(0); >> =C2=A0} > > If I'm not mistaken, intr_add_cpu() is under #ifdef SMP, so it should be > here as well. You are right, sorry, I did forgot to test without SMP. I think we still need intr_add_cpu() on cpu_startup() because of the case smp_disabled =3D 1. I think the attached patch should make its dirty job, opinion? Thanks, Attilio Index: sys/i386/include/intr_machdep.h =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- sys/i386/include/intr_machdep.h (revisione 234073) +++ sys/i386/include/intr_machdep.h (copia locale) @@ -131,9 +131,7 @@ int elcr_probe(void); enum intr_trigger elcr_read_trigger(u_int irq); void elcr_resume(void); void elcr_write_trigger(u_int irq, enum intr_trigger trigger); -#ifdef SMP void intr_add_cpu(u_int cpu); -#endif int intr_add_handler(const char *name, int vector, driver_filter_t filt= er, driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep= ); #ifdef SMP Index: sys/amd64/include/intr_machdep.h =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- sys/amd64/include/intr_machdep.h (revisione 234073) +++ sys/amd64/include/intr_machdep.h (copia locale) @@ -140,9 +140,7 @@ int elcr_probe(void); enum intr_trigger elcr_read_trigger(u_int irq); void elcr_resume(void); void elcr_write_trigger(u_int irq, enum intr_trigger trigger); -#ifdef SMP void intr_add_cpu(u_int cpu); -#endif int intr_add_handler(const char *name, int vector, driver_filter_t filt= er, driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep); Index: sys/x86/x86/intr_machdep.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- sys/x86/x86/intr_machdep.c (revisione 234073) +++ sys/x86/x86/intr_machdep.c (copia locale) @@ -446,16 +446,34 @@ DB_SHOW_COMMAND(irqs, db_show_irqs) } #endif -#ifdef SMP /* * Support for balancing interrupt sources across CPUs. For now we just * allocate CPUs round-robin. */ static cpuset_t intr_cpus; +#ifdef SMP static int current_cpu; +#endif /* + * Add a CPU to our mask of valid CPUs that can be destinations of + * interrupts. + */ +void +intr_add_cpu(u_int cpu) +{ + + if (cpu >=3D MAXCPU) + panic("%s: Invalid CPU ID", __func__); + if (bootverbose) + printf("INTR: Adding CPU %u as a target\n", cpu); + + CPU_SET(cpu, &intr_cpus); +} + +#ifdef SMP +/* * Return the CPU that the next interrupt source should use. For now * this just returns the next local APIC according to round-robin. */ @@ -492,23 +510,6 @@ intr_bind(u_int vector, u_char cpu) } /* - * Add a CPU to our mask of valid CPUs that can be destinations of - * interrupts. - */ -void -intr_add_cpu(u_int cpu) -{ - - if (cpu >=3D MAXCPU) - panic("%s: Invalid CPU ID", __func__); - if (bootverbose) - printf("INTR: Adding local APIC %d as a target\n", - cpu_apic_ids[cpu]); - - CPU_SET(cpu, &intr_cpus); -} - -/* * Distribute all the interrupt sources among the available CPUs once the * AP's have been launched. */