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From: Marcel Moolenaar <marcel@xcllnt.net>
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Date: Mon, 4 Jul 2011 13:39:32 -0700
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	<20110704201028.GA5939@freebsd.org>
To: Roman Divacky <rdivacky@freebsd.org>
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Cc: svn-src-projects@freebsd.org, Marcel Moolenaar <marcel@freebsd.org>,
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Subject: Re: svn commit: r223767 - in projects/llvm-ia64:
	contrib/llvm/lib/Target/IA64 lib/clang/include
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On Jul 4, 2011, at 1:10 PM, Roman Divacky wrote:

> First of all.. big wow :) This is awesome progress.

Thanks!

>> +void
>> +IA64InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
>> +    MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg,
>> +    unsigned SrcReg, bool KillSrc) const
>> +{
>> +  bool GRDest =3D IA64::GRRegClass.contains(DestReg);
>> +  bool GRSrc  =3D IA64::GRRegClass.contains(SrcReg);
>> +
>> +  if (GRDest && GRSrc) {
>> +    MachineInstrBuilder MIB =3D BuildMI(MBB, MI, DL, get(IA64::ADD), =
DestReg);
>> +    MIB.addReg(IA64::R0);
>> +    MIB.addReg(SrcReg, getKillRegState(KillSrc));
>> +    return;
>> +  }
>> +
>> +  llvm_unreachable(__func__);
>> +}
>=20
> copyPhysReg() done via ADD ? Is this just some temporary measure to =
achieve
> emission of any code? I am not even sure how this can work. The IR =
should
> require you to lower the ISD::ADD node, right? You don't seem to be =
doing that.

On ia64 there's no copy instruction in H/W. The assembler defines
"mov r1=3Dr2" as a pseudo-op of "adds r1=3D0,r2". Since I didn't want
to introduce an immediate operand yet, I simply used r0, which is
hardwired as 0. The result is the same...

As for the lowering: the add is eliminated shortly after it's
created by virtue of copy elimination, CSE and/or GVN on the
selection DAG. We know we can lower ADDs anyway, because it's
in the assembly output :-)

--=20
Marcel Moolenaar
marcel@xcllnt.net