From owner-svn-src-stable@freebsd.org Tue Sep 24 02:41:40 2019 Return-Path: Delivered-To: svn-src-stable@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id C4818F3CEB; Tue, 24 Sep 2019 02:41:40 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 46clnc4XF7z3PJh; Tue, 24 Sep 2019 02:41:40 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 80034208BF; Tue, 24 Sep 2019 02:41:40 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x8O2feDU086637; Tue, 24 Sep 2019 02:41:40 GMT (envelope-from mhorne@FreeBSD.org) Received: (from mhorne@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x8O2fdoN086634; Tue, 24 Sep 2019 02:41:39 GMT (envelope-from mhorne@FreeBSD.org) Message-Id: <201909240241.x8O2fdoN086634@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mhorne set sender to mhorne@FreeBSD.org using -f From: Mitchell Horne Date: Tue, 24 Sep 2019 02:41:39 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r352642 - in stable/12/sys/riscv: conf riscv X-SVN-Group: stable-12 X-SVN-Commit-Author: mhorne X-SVN-Commit-Paths: in stable/12/sys/riscv: conf riscv X-SVN-Commit-Revision: 352642 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 24 Sep 2019 02:41:40 -0000 Author: mhorne Date: Tue Sep 24 02:41:39 2019 New Revision: 352642 URL: https://svnweb.freebsd.org/changeset/base/352642 Log: MFC r352430: RISC-V: Support EARLY_AP_STARTUP Modified: stable/12/sys/riscv/conf/GENERIC stable/12/sys/riscv/riscv/clock.c stable/12/sys/riscv/riscv/mp_machdep.c Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/riscv/conf/GENERIC ============================================================================== --- stable/12/sys/riscv/conf/GENERIC Tue Sep 24 02:38:08 2019 (r352641) +++ stable/12/sys/riscv/conf/GENERIC Tue Sep 24 02:41:39 2019 (r352642) @@ -72,6 +72,7 @@ options RACCT # Resource accounting framework options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default options RCTL # Resource limits options SMP +options EARLY_AP_STARTUP options INTRNG # RISC-V SBI console Modified: stable/12/sys/riscv/riscv/clock.c ============================================================================== --- stable/12/sys/riscv/riscv/clock.c Tue Sep 24 02:38:08 2019 (r352641) +++ stable/12/sys/riscv/riscv/clock.c Tue Sep 24 02:41:39 2019 (r352642) @@ -37,10 +37,34 @@ __FBSDID("$FreeBSD$"); #include #include +#include +#include +#include +#include +#include void cpu_initclocks(void) { +#ifdef EARLY_AP_STARTUP + struct thread *td; + int i; + td = curthread; cpu_initclocks_bsp(); + CPU_FOREACH(i) { + if (i == 0) + continue; + thread_lock(td); + sched_bind(td, i); + thread_unlock(td); + cpu_initclocks_ap(); + } + thread_lock(td); + if (sched_is_bound(td)) + sched_unbind(td); + thread_unlock(td); +#else + cpu_initclocks_bsp(); +#endif } Modified: stable/12/sys/riscv/riscv/mp_machdep.c ============================================================================== --- stable/12/sys/riscv/riscv/mp_machdep.c Tue Sep 24 02:38:08 2019 (r352641) +++ stable/12/sys/riscv/riscv/mp_machdep.c Tue Sep 24 02:41:39 2019 (r352642) @@ -258,8 +258,10 @@ init_secondary(uint64_t hart) /* Enable software interrupts */ riscv_unmask_ipi(); +#ifndef EARLY_AP_STARTUP /* Start per-CPU event timers. */ cpu_initclocks_ap(); +#endif /* Enable external (PLIC) interrupts */ csr_set(sie, SIE_SEIE);