From owner-freebsd-arm@freebsd.org Mon Apr 3 14:37:25 2017 Return-Path: Delivered-To: freebsd-arm@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id EB019D2C48B for ; Mon, 3 Apr 2017 14:37:25 +0000 (UTC) (envelope-from andrew@fubar.geek.nz) Received: from fry.fubar.geek.nz (fry.fubar.geek.nz [139.59.165.16]) by mx1.freebsd.org (Postfix) with ESMTP id B3ACA679 for ; Mon, 3 Apr 2017 14:37:25 +0000 (UTC) (envelope-from andrew@fubar.geek.nz) Received: from dhcp-10-248-121-82.eduroam.wireless.private.cam.ac.uk (global-5-144.nat-2.net.cam.ac.uk [131.111.5.144]) by fry.fubar.geek.nz (Postfix) with ESMTPSA id 081EC4E721; Mon, 3 Apr 2017 14:37:24 +0000 (UTC) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 10.2 \(3259\)) Subject: Re: Coherent bus_dma for ARMv7 From: Andrew Turner In-Reply-To: Date: Mon, 3 Apr 2017 15:37:23 +0100 Cc: Marcin Wojtas , Adrian Chadd , "freebsd-arm@freebsd.org" Content-Transfer-Encoding: quoted-printable Message-Id: <5586A20F-125D-41EC-9741-BBFFDB0A7A38@fubar.geek.nz> References: <0EA39E6B-3460-45B9-8247-CB6CC8631C5F@fubar.geek.nz> To: Zbigniew Bodek X-Mailer: Apple Mail (2.3259) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Apr 2017 14:37:26 -0000 > On 3 Apr 2017, at 15:14, Zbigniew Bodek wrote: >=20 > 2017-04-03 15:37 GMT+02:00 Andrew Turner : >=20 > > On 3 Apr 2017, at 14:16, Marcin Wojtas wrote: > > > > Hi Adrian, > > > > Frankly we are not such experts in armv6 bus_dma, which looks more > > complicated than one in arm64, so we thought it's much safer no to = mix > > the two solutions and leave for the user a single switch to decide, > > which one to pick. Afaik Andrew Turner did the oposite for arm64 > > (implement not coherent solution on top of coherent bus_dma), = however > > I'm not sure if it's possible here in an easy way - there's also > > pretty significant risk of regression for all platforms. Please let = me > > know your opinion. Do you think some sort of update of armv6 is > > doable? >=20 > I don=E2=80=99t see any reason to think it would be difficult to add = support for coherent hardware to the existing armv6 busdma code. It=E2=80=99= s mostly skipping cache operations based on a flag in the dam tag. >=20 > Andrew >=20 > Hello Andrew, >=20 > I don't think anyone uses flags related to DMA coherency in = bus_dma_tag_create. The generic PCI and ThunderX PCIe PEM drivers do. The former based on = the FDT dma-coherent flag. >=20 > Nevertheless, for coherent platforms we want bus_dma to always map DMA = memory as normal WBWA regardless of the flags passed to create a bus_dma = MAP. > For example, we don't want to perform any synchronization and we want = to have the cacheable memory regardless of BUS_DMA_COHERENT flag used. That=E2=80=99s already the case on arm64, the only synchronisation used = when the tag is created with BUS_DMA_COHERENT is a memory barrier. > Otherwise the performance improvement will apply only to those drivers = that dare to use BUS_DMA_COHERENT flag and very few of them does that. = In other words, what is the point of having coherent DMA if you do cache = maintenance anyway? The drivers should be getting the parent DMA tag and passing this to = bus_dma_tag_create. If this was created with BUS_DMA_COHERENT it will = pass this to the child tag. This is how the above PCI drivers work.=20 Andrew