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Date:      Mon, 14 Jan 2008 12:35:24 -0500
From:      Nathan Lay <nslay@comcast.net>
To:        Igor Mozolevsky <igor@hybrid-lab.co.uk>
Cc:        current <current@freebsd.org>, freebsd-current@freebsd.org, Joe Marcus Clarke <marcus@freebsd.org>, Peter Jeremy <peterjeremy@optushome.com.au>, Kostik Belousov <kostikbel@gmail.com>
Subject:   Re: RFC: Adding a hw.features[2] sysctl
Message-ID:  <478B9D5C.4080101@comcast.net>
In-Reply-To: <a2b6592c0801140126t4565b582ob4e9d10a4cd98147@mail.gmail.com>
References:  <1200197787.67286.13.camel@shumai.marcuscom.com>	 <20080113182457.GN929@server.vk2pj.dyndns.org>	 <a2b6592c0801131721w25afae5bg3dcf6a90c1a3d2b7@mail.gmail.com>	 <200801141254.20400.doconnor@gsoft.com.au>	 <a2b6592c0801131838jcde3634le6087d2f784adcbc@mail.gmail.com>	 <478AE741.1000105@comcast.net> <a2b6592c0801140126t4565b582ob4e9d10a4cd98147@mail.gmail.com>

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Igor Mozolevsky wrote:
> On 14/01/2008, Nathan Lay <nslay@comcast.net> wrote:
>
>   
>> I have to agree with Daniel here.  ioctl is probably inappropriate.
>> sysctl is already intended for gathering or setting system information
>> by both programs and/or people.  cat'ing /dev/cpuinfo sounds reminiscent
>> to Linux /proc.
>>
>> sysctl() could fill a cpu features bitmask for programs.
>> sysctl dev.cpu.features (or something like that) could output those
>> features in human readable format.
>>     
>
> So how would you MIB these:
>
> "
> CPU: Dual Core AMD Opteron(tm) Processor 280 (2411.12-MHz K8-class CPU)
>   Origin = "AuthenticAMD"  Id = 0x20f12  Stepping = 2
>   Features=0x178bfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,MMX,FXSR,SSE,SSE2,HTT>
>   Features2=0x1<SSE3>
>   AMD Features=0xe2500800<SYSCALL,NX,MMX+,FFXSR,LM,3DNow!+,3DNow!>
>   AMD Features2=0x3<LAHF,CMP>
>   Cores per package: 2
> "
>
> ? Would you need four separate MIBs? Have four separate bitmasks in
> one MIB, what order in? Is there XXX Features3, what would happen
> then?
>
>
> Igor
>
>   
Make one contiguous bitmask that include all of them.  That way the 
bitmask can sit in one sysctl MIB.

For example:

typedef uint8_t cpu_features_t[4*4]; /* 4 32 bit masks */

#define CPU_HAS_FEATURE(mask,feature) ( (mask)[(feature) >> 3] & 
(1<<((feature) & 0x07)) )

/* CPU features - reflect bit positions */
#define CPU_I386_SSE    1
#define CPU_I386_SSE2    2
...
#define CPU_AMD64_ ...
etc, etc...

Something along these lines.  This of course removes the elegant OR'd 
flags and you'd have to do something like

cpu_features_t mask;

sysctl( ... ); /* Get mask */
if ( CPU_HAS_FEATURE(mask, CPU_I386_SSE) || CPU_HAS_FEATURE(mask, 
CPU_I386_SSE2) ) ) { ... }

These bit positions could be reclaimed for use by other 
architectures...the programmer's code or makefile would have to check 
that the code is being compiled on the intended architecture, otherwise 
you might have unexpected results (e.g. CPU_I386_SSE might mean 
something else).

Best Regards,
Nathan Lay



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