From owner-freebsd-hackers Fri Apr 11 10:43:57 1997 Return-Path: Received: (from root@localhost) by freefall.freebsd.org (8.8.5/8.8.5) id KAA05560 for hackers-outgoing; Fri, 11 Apr 1997 10:43:57 -0700 (PDT) Received: from phaeton.artisoft.com (phaeton.Artisoft.COM [198.17.250.50]) by freefall.freebsd.org (8.8.5/8.8.5) with SMTP id KAA05553 for ; Fri, 11 Apr 1997 10:43:53 -0700 (PDT) Received: (from terry@localhost) by phaeton.artisoft.com (8.6.11/8.6.9) id KAA11656; Fri, 11 Apr 1997 10:23:17 -0700 From: Terry Lambert Message-Id: <199704111723.KAA11656@phaeton.artisoft.com> Subject: Re: 430TX ? To: steve@visint.co.uk (Stephen Roome) Date: Fri, 11 Apr 1997 10:23:17 -0700 (MST) Cc: terry@lambert.org, avalon@coombs.anu.edu.au, hackers@freebsd.org In-Reply-To: from "Stephen Roome" at Apr 11, 97 12:43:33 pm X-Mailer: ELM [version 2.4 PL24] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: owner-hackers@freebsd.org X-Loop: FreeBSD.org Precedence: bulk > > PCI chipsets are configured at BIOS POST time. > > > > You do not need chipset specific drivers. > > It might be useful if FreeBSD knew that only X amount of mem was > cacheable, don't know why, but it strikes that it *could* optimise where > stuff gets stored that way. Yes, but it doesn't *require* this information to function, so the chipset is irrelevant to the current code base. > > The SMP stuff wants chipset specific drivers because it wants to count > > bridges on machines with broken MP-tables in ROM/RAM/FLASH counts of > > the number of PCI bridges (so far: one motherboard vendor). > > Which one ? This might be a good thing to know before I buy a motherboard! The Tyan S1668 motherboard has incorrect mptable data. As a result, the SMP kernel (which runs in APIC I/O mode in order to virtual wire the interrupts instead of causing them to be serviced by a single processor -- assymetrically) causes one of the PCI cards to be serviced by the ISA interrupt code, which confuses the PCI interrupt sharing code. There is a "known rogue" kludge option for compiling an SMP kernel for the board. If you are considering buying an SMP motherboard, you should scan the SMP list archives before you buy. There are a number of motherboards which do not wire the clock interrupt to the APIC, and as such, greatly complicate the interrupt handling code that needs to be used. It's a big lose to get one of these boards and run it in "mixed" mode like that. If I had my druthers, the boards would be on a "don't buy" list somewhere. Regards, Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.