Date: Fri, 23 Apr 2010 19:20:56 +0000 (UTC) From: Juli Mallett <jmallett@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r207131 - in head/sys/mips: conf sibyte Message-ID: <201004231920.o3NJKuPo090836@svn.freebsd.org>
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Author: jmallett Date: Fri Apr 23 19:20:56 2010 New Revision: 207131 URL: http://svn.freebsd.org/changeset/base/207131 Log: o) Remove default MAXMEM on SWARM; pmap can readily use lmem for >512M physical addresses. o) Set a local maxmem in sb_machdep.c to avoid trying to use pages over 2^64 under 32-bit ABIs. Our pmap needs corrected to use vm_paddr_t consistently, then we can make vm_paddr_t 64-bit under 32-bit ABIs and add code in pmap to limit phys_avail by the maximum PFN that a 32-bit PTE can hold. Modified: head/sys/mips/conf/SWARM head/sys/mips/sibyte/sb_machdep.c Modified: head/sys/mips/conf/SWARM ============================================================================== --- head/sys/mips/conf/SWARM Fri Apr 23 18:53:17 2010 (r207130) +++ head/sys/mips/conf/SWARM Fri Apr 23 19:20:56 2010 (r207131) @@ -8,12 +8,6 @@ options CPU_SB1 files "../sibyte/files.sibyte" hints "SWARM.hints" -# -# 32-bit kernel cannot deal with physical memory beyond 4GB -# XXX pmap assumes that all the memory can be mapped using KSEG0 -# -options MAXMEM=512*1024 - options CFE options CFE_CONSOLE options CFE_ENV Modified: head/sys/mips/sibyte/sb_machdep.c ============================================================================== --- head/sys/mips/sibyte/sb_machdep.c Fri Apr 23 18:53:17 2010 (r207130) +++ head/sys/mips/sibyte/sb_machdep.c Fri Apr 23 19:20:56 2010 (r207131) @@ -158,6 +158,17 @@ mips_init(void) TUNABLE_INT_FETCH("hw.physmem", &tmp); maxmem = (uint64_t)tmp * 1024; + /* + * XXX + * If we used vm_paddr_t consistently in pmap, etc., we could + * use 64-bit page numbers on !n64 systems, too, like i386 + * does with PAE. + */ +#if !defined(__mips_n64) + if (maxmem == 0 || maxmem > 0xffffffff) + maxmem = 0xffffffff; +#endif + #ifdef CFE /* * Query DRAM memory map from CFE.
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