From nobody Mon Jul 24 20:53:14 2023 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4R8snQ3T7Jz4pSrL; Mon, 24 Jul 2023 20:53:14 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4R8snQ2Vv6z3kxT; Mon, 24 Jul 2023 20:53:14 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1690231994; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=6W3y8wjGcScJ3k8Ia4KPksLqnE6YGa4Dqr4iDd4VPdA=; b=DL+xqNhWuyeyGyxgajT97qi3qEHovO4AzcR1ZN9otCMT+GTQMBAoQiWW9LY4WXY8K+FCSP H5UaaVDq0wtVjtfYeEsagbfygx8UkwHOxqIbHYrbHtUX/Ip5vNI29ztG5FfPWV2wS/Z9Dm +Jmp7yG7Vuz6thShfL+o92GmGjq0lUIl7Sa6saiUgM4yCYVZwwnW53T8NY8kBtZ5kEt7Sy bbQN0ZDE1/N52sfPPUWHj+NGOh2tK7dS/ZIOdZnc5LzciTlZzRMVyuzYcXzoMLTKoNA63P BIWx77jFOkd8z+2bcAIgtTMQ6+KawSRldn4Q2ypgcqdobskV/1+pxGX1ONo5vQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1690231994; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=6W3y8wjGcScJ3k8Ia4KPksLqnE6YGa4Dqr4iDd4VPdA=; b=vak2JxarGuzidORNc2fEda9ZE9hQD/xDGBf14Pl8XON6UT12jlEMT6tXMdADBsJeDi1hJR tp5lzKzUDlfldisCUb+DNQgkk02IG2AYaUlB+x+pQxhzDGP5DrypiLrZJ4PkkMJ9MMNYR9 aAqutRynEM/urj+FLWInb2HDWyFg12wXhqqmI5GXXuNOcvie2aRsXdT9vemIvOnGR9IIAa qCQBAOsPEVGjawCkLedRaNumyqUlRu18ey92iS512rV+ScrdkcjFw/eyc+YvlZNwF1gp25 228TQxGjijDPHInEtOmBGcfKltKytw8pG/3iS/LXZK4YrikeoVlsL32G3u1oww== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1690231994; a=rsa-sha256; cv=none; b=lHhUUcB63k8ATcui2727rT1wiC9OZd9kRWFsPzl0ouhLEKt6bDy2ALjemD8Z135jvlsqKz xEUVCsK5IZE/Dn4wqIMtQuSWm8gj+gQUKanjl0iHalOSnlWvbAR9wAKe2h/mRH3SWYIhVX Neiwpj/j/dmOmJEppsWPH+WmZ+FsJKpQh86ZFmR1ED1uPT7OvXZtqJYIxoGzlp4TCAjKo4 0X6PcLqeppKXIdrxcOJ3MDFyXa7nT7D0AoVh5uBwZfjmHuzaixY35UX+8Px0CmYMijw/t1 CuCTAB3c5Kc7lEjNRjLMgTTPWfQfe3Iz0vapKXo8G8p6M8wgw5A6hFj6/Wk9Ww== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4R8snQ1Xg6zXwZ; Mon, 24 Jul 2023 20:53:14 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 36OKrE4h092337; Mon, 24 Jul 2023 20:53:14 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 36OKrEao092336; Mon, 24 Jul 2023 20:53:14 GMT (envelope-from git) Date: Mon, 24 Jul 2023 20:53:14 GMT Message-Id: <202307242053.36OKrEao092336@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Mitchell Horne Subject: git: e57b86266b80 - main - arm64/disassem.c: remove redundant OP_RN_SP for TYPE_02 List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mhorne X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: e57b86266b80e1eed266a8287ae51c941c591b9d Auto-Submitted: auto-generated The branch main has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=e57b86266b80e1eed266a8287ae51c941c591b9d commit e57b86266b80e1eed266a8287ae51c941c591b9d Author: Mykola Hohsadze AuthorDate: 2023-07-24 20:47:17 +0000 Commit: Mitchell Horne CommitDate: 2023-07-24 20:51:08 +0000 arm64/disassem.c: remove redundant OP_RN_SP for TYPE_02 Removed redundant OP_RN_SP for TYPE_02, since these addressing modes always use the SP register, never XZR. Reviewed by: mhorne MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D40588 --- sys/arm64/arm64/disassem.c | 78 +++++++++++++++++++++++++--------------------- 1 file changed, 42 insertions(+), 36 deletions(-) diff --git a/sys/arm64/arm64/disassem.c b/sys/arm64/arm64/disassem.c index 5dc0bf5100ef..c1e38266a2e0 100644 --- a/sys/arm64/arm64/disassem.c +++ b/sys/arm64/arm64/disassem.c @@ -98,9 +98,10 @@ enum arm64_format_type { TYPE_01, /* - * OP , [, #]{!} SF32/64 - * OP , [], #{!} SF32/64 - * OP , , {, EXTEND AMOUNT } + * OP , [, #]! + * OP , [], # + * OP , [ {, # }] + * OP , [, {, EXTEND AMOUNT }] */ TYPE_02, @@ -159,69 +160,73 @@ static struct arm64_insn arm64_i[] = { { "adds", "SF(1)|0101011|SHIFT(2)|0|RM(5)|IMM(6)|RN(5)|RD(5)", TYPE_01, 0 }, /* adds shifted register */ { "ldr", "1|SF(1)|111000010|IMM(9)|OPTION(2)|RN(5)|RT(5)", - TYPE_02, OP_SIGN_EXT | OP_RN_SP }, /* ldr immediate post/pre index */ + TYPE_02, OP_SIGN_EXT }, + /* ldr immediate post/pre index */ { "ldr", "1|SF(1)|11100101|IMM(12)|RN(5)|RT(5)", - TYPE_02, OP_RN_SP }, /* ldr immediate unsigned */ + TYPE_02, 0 }, /* ldr immediate unsigned */ { "ldr", "1|SF(1)|111000011|RM(5)|OPTION(3)|SCALE(1)|10|RN(5)|RT(5)", - TYPE_02, OP_RN_SP }, /* ldr register */ + TYPE_02, 0 }, /* ldr register */ { "ldr", "0|SF(1)|011000|IMM(19)|RT(5)", TYPE_03, OP_SIGN_EXT | OP_LITERAL | OP_MULT_4 }, /* ldr literal */ { "ldrb", "00|111000010|IMM(9)|OPTION(2)|RN(5)|RT(5)", - TYPE_02, OP_SIGN_EXT | OP_SF32 | OP_RN_SP }, + TYPE_02, OP_SIGN_EXT | OP_SF32 }, /* ldrb immediate post/pre index */ { "ldrb", "00|11100101|IMM(12)|RN(5)|RT(5)", - TYPE_02, OP_SF32 | OP_RN_SP }, /* ldrb immediate unsigned */ + TYPE_02, OP_SF32 }, /* ldrb immediate unsigned */ { "ldrb", "00|111000011|RM(5)|OPTION(3)|SCALE(1)|10|RN(5)|RT(5)", - TYPE_02, OP_SF32 | OP_RN_SP }, /* ldrb register */ + TYPE_02, OP_SF32 }, /* ldrb register */ { "ldrh", "01|111000010|IMM(9)|OPTION(2)|RN(5)|RT(5)", TYPE_02, - OP_SIGN_EXT | OP_SF32 | OP_RN_SP }, /* ldrh immediate post/pre index */ + OP_SIGN_EXT | OP_SF32 }, + /* ldrh immediate post/pre index */ { "ldrh", "01|11100101|IMM(12)|RN(5)|RT(5)", - TYPE_02, OP_SF32 | OP_RN_SP }, /* ldrh immediate unsigned */ + TYPE_02, OP_SF32 }, /* ldrh immediate unsigned */ { "ldrh", "01|111000011|RM(5)|OPTION(3)|SCALE(1)|10|RN(5)|RT(5)", - TYPE_02, OP_SF32 | OP_RN_SP }, /* ldrh register */ + TYPE_02, OP_SF32 }, /* ldrh register */ { "ldrsb", "001110001|SF(1)|0|IMM(9)|OPTION(2)|RN(5)|RT(5)", - TYPE_02, OP_SIGN_EXT | OP_SF_INV | OP_RN_SP }, + TYPE_02, OP_SIGN_EXT | OP_SF_INV }, /* ldrsb immediate post/pre index */ { "ldrsb", "001110011|SF(1)|IMM(12)|RN(5)|RT(5)",\ - TYPE_02, OP_SF_INV | OP_RN_SP }, /* ldrsb immediate unsigned */ + TYPE_02, OP_SF_INV }, /* ldrsb immediate unsigned */ { "ldrsb", "001110001|SF(1)|1|RM(5)|OPTION(3)|SCALE(1)|10|RN(5)|RT(5)", - TYPE_02, OP_SF_INV | OP_RN_SP }, /* ldrsb register */ + TYPE_02, OP_SF_INV }, /* ldrsb register */ { "ldrsh", "011110001|SF(1)|0|IMM(9)|OPTION(2)|RN(5)|RT(5)", - TYPE_02, OP_SIGN_EXT | OP_SF_INV | OP_RN_SP }, + TYPE_02, OP_SIGN_EXT | OP_SF_INV }, /* ldrsh immediate post/pre index */ { "ldrsh", "011110011|SF(1)|IMM(12)|RN(5)|RT(5)", - TYPE_02, OP_SF_INV | OP_RN_SP }, /* ldrsh immediate unsigned */ + TYPE_02, OP_SF_INV }, /* ldrsh immediate unsigned */ { "ldrsh", "011110001|SF(1)|1|RM(5)|OPTION(3)|SCALE(1)|10|RN(5)|RT(5)", - TYPE_02, OP_SF_INV | OP_RN_SP }, /* ldrsh register */ + TYPE_02, OP_SF_INV }, /* ldrsh register */ { "ldrsw", "10111000100|IMM(9)|OPTION(2)|RN(5)|RT(5)", - TYPE_02, OP_SIGN_EXT | OP_RN_SP }, /* ldrsw immediate post/pre index */ + TYPE_02, OP_SIGN_EXT }, + /* ldrsw immediate post/pre index */ { "ldrsw", "1011100110|IMM(12)|RN(5)|RT(5)", - TYPE_02, OP_RN_SP }, /* ldrsw immediate unsigned */ + TYPE_02, 0 }, /* ldrsw immediate unsigned */ { "ldrsw", "10111000101|RM(5)|OPTION(3)|SCALE(1)|10|RN(5)|RT(5)", - TYPE_02, OP_RN_SP }, /* ldrsw register */ + TYPE_02, 0 }, /* ldrsw register */ { "ldrsw", "10011000|IMM(19)|RT(5)", TYPE_03, OP_SIGN_EXT | OP_LITERAL | OP_MULT_4 }, /* ldrsw literal */ { "str", "1|SF(1)|111000000|IMM(9)|OPTION(2)|RN(5)|RT(5)", - TYPE_02, OP_SIGN_EXT | OP_RN_SP }, /* str immediate post/pre index */ + TYPE_02, OP_SIGN_EXT }, + /* str immediate post/pre index */ { "str", "1|SF(1)|11100100|IMM(12)|RN(5)|RT(5)", - TYPE_02, OP_RN_SP }, /* str immediate unsigned */ + TYPE_02, 0 }, /* str immediate unsigned */ { "str", "1|SF(1)|111000001|RM(5)|OPTION(3)|SCALE(1)|10|RN(5)|RT(5)", - TYPE_02, OP_RN_SP }, /* str register */ + TYPE_02, 0 }, /* str register */ { "strb", "00111000000|IMM(9)|OPTION(2)|RN(5)|RT(5)", - TYPE_02, OP_SIGN_EXT | OP_SF32 | OP_RN_SP }, + TYPE_02, OP_SIGN_EXT | OP_SF32 }, /* strb immediate post/pre index */ { "strb", "0011100100|IMM(12)|RN(5)|RT(5)", - TYPE_02, OP_SF32 | OP_RN_SP }, /* strb immediate unsigned */ + TYPE_02, OP_SF32 }, /* strb immediate unsigned */ { "strb", "00111000001|RM(5)|OPTION(3)|SCALE(1)|10|RN(5)|RT(5)", - TYPE_02, OP_SF32 | OP_RN_SP }, /* strb register */ + TYPE_02, OP_SF32 }, /* strb register */ { "strh", "01111000000|IMM(9)|OPTION(2)|RN(5)|RT(5)", - TYPE_02, OP_SF32 | OP_SIGN_EXT | OP_RN_SP }, + TYPE_02, OP_SF32 | OP_SIGN_EXT }, /* strh immediate post/pre index */ { "strh", "0111100100|IMM(12)|RN(5)|RT(5)", - TYPE_02, OP_SF32 | OP_RN_SP }, + TYPE_02, OP_SF32 }, /* strh immediate unsigned */ { "strh", "01111000001|RM(5)|OPTION(3)|SCALE(1)|10|RN(5)|RT(5)", - TYPE_02, OP_SF32 | OP_RN_SP }, + TYPE_02, OP_SF32 }, /* strh register */ { "neg", "SF(1)|1001011|SHIFT(2)|0|RM(5)|IMM(6)|11111|RD(5)", TYPE_01, 0 }, /* neg shifted register */ @@ -547,9 +552,10 @@ disasm(const struct disasm_interface *di, vm_offset_t loc, int altfmt) break; case TYPE_02: /* - * OP , [, #]{!}] SF32/64 - * OP , [], #{!} SF32/64 - * OP , , {, EXTEND AMOUNT } + * OP , [, #]! + * OP , [], # + * OP , [ {, # }] + * OP , [, {, EXTEND AMOUNT }] */ /* Mandatory tokens */ @@ -596,12 +602,12 @@ disasm(const struct disasm_interface *di, vm_offset_t loc, int altfmt) di->di_printf("%s\t%s, ", i_ptr->name, arm64_reg(sf, rt, rt_sp)); if (inside != 0) { - di->di_printf("[%s", arm64_reg(1, rn, rn_sp)); + di->di_printf("[%s", arm64_x_reg(rn, 1)); if (imm != 0) di->di_printf(", #%d", imm); di->di_printf("]"); } else { - di->di_printf("[%s]", arm64_reg(1, rn, rn_sp)); + di->di_printf("[%s]", arm64_x_reg(rn, 1)); if (imm != 0) di->di_printf(", #%d", imm); } @@ -610,7 +616,7 @@ disasm(const struct disasm_interface *di, vm_offset_t loc, int altfmt) } else { /* Last bit of option field determines 32/64 bit offset */ di->di_printf("%s\t%s, [%s, %s", i_ptr->name, - arm64_reg(sf, rt, rt_sp), arm64_reg(1, rn, rn_sp), + arm64_reg(sf, rt, rt_sp), arm64_x_reg(rn, 1), arm64_reg(option & 1, rm, rm_sp)); if (scale == 0)