From owner-svn-src-all@FreeBSD.ORG Wed Oct 9 23:53:22 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 7228D848; Wed, 9 Oct 2013 23:53:22 +0000 (UTC) (envelope-from grehan@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 5D90B2F6A; Wed, 9 Oct 2013 23:53:22 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id r99NrMIo015063; Wed, 9 Oct 2013 23:53:22 GMT (envelope-from grehan@svn.freebsd.org) Received: (from grehan@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id r99NrMWa015062; Wed, 9 Oct 2013 23:53:22 GMT (envelope-from grehan@svn.freebsd.org) Message-Id: <201310092353.r99NrMWa015062@svn.freebsd.org> From: Peter Grehan Date: Wed, 9 Oct 2013 23:53:22 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r256248 - head/usr.sbin/bhyve X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 09 Oct 2013 23:53:22 -0000 Author: grehan Date: Wed Oct 9 23:53:21 2013 New Revision: 256248 URL: http://svnweb.freebsd.org/changeset/base/256248 Log: Allow a 4-byte write to PCI config space to overlap the 2 read-only bytes at the start of a PCI capability. This is the sequence that OpenBSD uses when enabling MSI interrupts, and works fine on real h/w. In bhyve, convert the 4 byte write to a 2-byte write to the r/w area past the first 2 r/o bytes of a capability. Reviewed by: neel Approved by: re@ (blanket) Modified: head/usr.sbin/bhyve/pci_emul.c Modified: head/usr.sbin/bhyve/pci_emul.c ============================================================================== --- head/usr.sbin/bhyve/pci_emul.c Wed Oct 9 22:10:03 2013 (r256247) +++ head/usr.sbin/bhyve/pci_emul.c Wed Oct 9 23:53:21 2013 (r256248) @@ -941,10 +941,19 @@ pci_emul_capwrite(struct pci_devinst *pi assert(offset >= capoff); /* - * Capability ID and Next Capability Pointer are readonly + * Capability ID and Next Capability Pointer are readonly. + * However, some o/s's do 4-byte writes that include these. + * For this case, trim the write back to 2 bytes and adjust + * the data. */ - if (offset == capoff || offset == capoff + 1) - return; + if (offset == capoff || offset == capoff + 1) { + if (offset == capoff && bytes == 4) { + bytes = 2; + offset += 2; + val >>= 16; + } else + return; + } switch (capid) { case PCIY_MSI: