Skip site navigation (1)Skip section navigation (2)
Date:      Wed, 21 Sep 2016 14:22:15 +0300
From:      Daniel Braniss <danny@cs.huji.ac.il>
To:        Jared McNeill <jmcneill@invisible.ca>
Cc:        arm@freebsd.org
Subject:   Re: ALL WINNER high temp. stop
Message-ID:  <F9921024-17CF-4654-83B1-CD4D705DA25D@cs.huji.ac.il>
In-Reply-To: <7BFD291A-E619-4DE4-9BBB-C1F40E81F12A@cs.huji.ac.il>
References:  <B11041B2-0EDD-4E20-8684-CB471C17D81B@cs.huji.ac.il> <20160917171911.a2ec80da747ba373ba3d1b4a@bidouilliste.com> <5ADFE16E-FD60-45B1-8CF1-6FFC10BABBDE@cs.huji.ac.il> <20160917195544.a2a8bbdb113029700fa7642d@bidouilliste.com> <588E44BB-40BF-40B8-9C5A-BA025AB87E00@cs.huji.ac.il> <alpine.DEB.2.11.1609180930230.641@dis.invisible.ca> <4F7891B0-FBD7-451C-BA42-50F872804C95@cs.huji.ac.il> <08E5651B-A28E-4BE8-803B-650CD2434979@cs.huji.ac.il> <01D85517-15ED-46FF-8C11-5A774EC1262F@cs.huji.ac.il> <alpine.DEB.2.11.1609210745050.641@dis.invisible.ca> <7BFD291A-E619-4DE4-9BBB-C1F40E81F12A@cs.huji.ac.il>

next in thread | previous in thread | raw e-mail | index | archive | help

> On 21 Sep 2016, at 14:13, Daniel Braniss <danny@cs.huji.ac.il> wrote:
>=20
>=20
>> On 21 Sep 2016, at 13:49, Jared McNeill <jmcneill@invisible.ca> =
wrote:
>>=20
>> CPU frequency scaling is supported now. Have you added operating =
points to the dts? Without a heatsink or fan, you need to set a =
reasonable set of operating points.
>>=20
>> 64C does seem quite low, the thermal driver uses the power-on default =
temperature for the shutdown temperature though (which should be > =
100C).
>>=20
>> Are you sure you are using the correct compat string for the thermal =
driver in your dts? Different SoCs use a different formula for reading =
the temperature.
>=20
> I=E2=80=99m using what you sent me :-)
> =
https://github.com/jaredmcneill/freebsd/blob/allwinner-h3/sys/boot/fdt/dts=
/arm/orangepi-plus-2e.dts#L12 =
<https://github.com/jaredmcneill/freebsd/blob/allwinner-h3/sys/boot/fdt/dt=
s/arm/orangepi-plus-2e.dts#L121>
>=20

here is my dts for the orange-one:
/*-
 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in =
the
 *    documentation and/or other materials provided with the =
distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' =
AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR =
PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE =
LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR =
CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE =
GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, =
STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY =
WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY =
OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */
#include "sun8i-h3-orangepi-one.dts"

/ {
        clocks {
	       ths_clk: clk@1c20074 {
	       	       #clock-cells =3D <0>;
		       compatible =3D "allwinner,sun8i-h3-ths-clk";
		       reg =3D <0x01c20074 0x4>;
		       clocks =3D <&osc24M>;
		       clock-output-names =3D "ths";
		};
        };
	soc {
		emac: ethernet@1c30000 {
			compatible =3D "allwinner,sun8i-h3-emac";
			reg =3D <0x01c30000 0x104>, <0x01c00030 0x4>;
			reg-names =3D "emac", "syscon";
			interrupts =3D <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
			resets =3D <&ahb_rst 17>;
			reset-names =3D "ahb";
			clocks =3D <&bus_gates 17>;
			clock-names =3D "ahb";
			#address-cells =3D <1>;
			#size-cells =3D <0>;
			status =3D "disabled";
		};
	=09
		sid: eeprom@01c14000 {
			compatible =3D "allwinner,sun8i-h3-sid";
			reg =3D <0x01c14000 0x400>;
		};

		rtp: rtp@1c25000 {
			compatible =3D "allwinner,sun8i-h3-ts";
			reg =3D <0x01c25000 0x400>;
			interrupts =3D <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
			clocks =3D <&bus_gates 72>,<&ths_clk>;
			clock-names =3D "ahb", "ths";
			resets =3D <&apb1_rst 8>;
			#thermal-sensor-cells =3D <0>;
		};

	};
};

&mmc0_pins_a {
	allwinner,pull =3D <SUN4I_PINCTRL_PULL_UP>;
};

&pio {
        emac_pins_rgmii_a: emac_rgmii@0 {
                allwinner,pins =3D "PD0", "PD1", "PD2", "PD3", "PD4", =
"PD5",
                		 "PD7", "PD8", "PD9", "PD10", "PD12", =
"PD13",
				 "PD15", "PD16", "PD17";
                allwinner,function =3D "emac";
                allwinner,drive =3D <SUN4I_PINCTRL_40_MA>;
                allwinner,pull =3D <SUN4I_PINCTRL_NO_PULL>;
        };

	emac_phy_reset_pin: emac_phy_reset_pin@0 {
		allwinner,pins =3D "PD6";
		allwinner,function =3D "gpio_out";
		allwinner,drive =3D <SUN4I_PINCTRL_10_MA>;
		allwinner,pull =3D <SUN4I_PINCTRL_NO_PULL>;
	};
};


/*
 * Board-specific stuff here
 */

/ {
	/*
	model =3D "Xunlong Orange Pi One";
	compatible =3D "xunlong,orangepi-one", "allwinner,sun8i-h3";
	*/
	reg_gmac_3v3: gmac-3v3 {
		compatible =3D "regulator-fixed";
		pinctrl-names =3D "default";
		pinctrl-0 =3D <&emac_phy_reset_pin>;
		regulator-name =3D "gmac-3v3";
		regulator-min-microvolt =3D <3300000>;
		regulator-max-microvolt =3D <3300000>;
		startup-delay-us =3D <100000>;
		enable-active-high;
		gpio =3D <&pio 3 6 GPIO_ACTIVE_HIGH>;
	};
};

&emac {
	phy-supply =3D <&reg_gmac_3v3>;
	phy-mode =3D "mii";
	phy =3D <&phy1>;

	allwinner,leds-active-low;
	status =3D "okay";

	allwinner,use-internal-phy;
	resets =3D <&ahb_rst 17>,<&ahb_rst 66>;
	reset-names =3D "ahb", "ephy";
	clocks =3D <&bus_gates 17>,<&bus_gates 128>;
	clock-names =3D "ahb","ephy";

	phy1: ethernet-phy@1 {
		reg =3D <1>;
	};
};

&ehci2 {
	status =3D "okay";
};


>=20
>>=20
>> Cheers,
>> Jared
>>=20
>> On Wed, 21 Sep 2016, Daniel Braniss wrote:
>>=20
>>> hi all,
>>> now that there is thermal control, trying to compile e.g. from ports
>>> portmaster, heats up the cpu, which somewhere around 64C
>>> decides to halt.
>>> Now, I remember some weeks ago, with a kernel version
>>> without the thermal stuff compiling python and all went ok,
>>> so
>>> Q: what is the thermal high water mark?
>>> Q: are the latest changes overheating the cpu, or is the thermal =
driver over
>>>   cautious?
>>>=20
>>> danny
>>>=20
>>>=20
>>>=20
>=20
> _______________________________________________
> freebsd-arm@freebsd.org mailing list
> https://lists.freebsd.org/mailman/listinfo/freebsd-arm
> To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org"




Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?F9921024-17CF-4654-83B1-CD4D705DA25D>