Date: Tue, 14 Apr 2009 16:00:07 +0200 From: Alexander Leidinger <Alexander@Leidinger.net> To: Marko Zec <zec@freebsd.org> Cc: freebsd-arch@freebsd.org Subject: Re: Simple #define for cache line size Message-ID: <20090414160007.15649rsc2fuyqxnk@webmail.leidinger.net> In-Reply-To: <200904140842.46501.zec@freebsd.org> References: <alpine.BSF.2.00.0904111700241.19879@fledge.watson.org> <gs0984$i3i$1@ger.gmane.org> <200904140842.46501.zec@freebsd.org>
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Quoting Marko Zec <zec@freebsd.org> (from Tue, 14 Apr 2009 08:42:46 +0200): > On Monday 13 April 2009 23:01:23 Ivan Voras wrote: >> Robert Watson wrote: >> > --- i386/include/param.h (revision 190941) >> > +++ i386/include/param.h (working copy) >> > @@ -74,6 +74,10 @@ >> > #define ALIGNBYTES _ALIGNBYTES >> > #define ALIGN(p) _ALIGN(p) >> > >> > +#ifndef CACHE_LINE_SIZE >> > +#define CACHE_LINE_SIZE 64 >> > +#endif >> >> Wouldn't it be better to continue the >> >> cpu I486_CPU >> cpu I586_CPU >> cpu I686_CPU >> >> series of defines in kernel configuration and define alignment per >> CPU architecture? > > We would have to extend our notion of "CPU architecture" for that to > make sense. For example, Pentium Pro / II CPUs had cache line size of > 32 bytes, Intel Netburst CPUs (all Pentium-4 and Xeons of the time) > have / had 128 bytes, while Pentium-III, Pentium-M and later Core CPUs > have 64 bytes. They are all I686_CPU in our view. I missed the beginning of the discussion. AFAIR we had some code which =20 determined the cache parameters at run time at least on i386. It may =20 be the case that this was removed when the VM system changed to not =20 need the page coloring we had. If this is the case, it may be =20 beneficial to look up the VCS history and resurrect this. Bye, Alexander. --=20 These days the necessities of life cost you about three times what they used to, and half the time they aren't even fit to drink. http://www.Leidinger.net Alexander @ Leidinger.net: PGP ID =3D B0063FE7 http://www.FreeBSD.org netchild @ FreeBSD.org : PGP ID =3D 72077137
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