Date: Fri, 11 Dec 2015 18:46:50 +0200 From: Stanislav Galabov <sgalabov@gmail.com> To: Adrian Chadd <adrian.chadd@gmail.com> Cc: Stanislav Galabov <sgalabov@gmail.com>, "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org> Subject: Re: MIPS_CONFIG0_VI defined wrong in sys/mips/include/cpuregs.h? Message-ID: <5866093A-E70C-4417-BFF6-B41CC35B571B@gmail.com> In-Reply-To: <CAJ-VmokUfu=ha8xjVWSKj1Bx7eE7ir2KzMB=HDu7rZ_ekkHXug@mail.gmail.com> References: <7514D462-9B7F-4728-8784-135614215992@gmail.com> <CAJ-VmokUfu=ha8xjVWSKj1Bx7eE7ir2KzMB=HDu7rZ_ekkHXug@mail.gmail.com>
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Hi Adrian, Done: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D205249 Best wishes, Stanislav > On Dec 11, 2015, at 18:38, Adrian Chadd <adrian.chadd@gmail.com> = wrote: >=20 > Hm, >=20 > Would you file a freebsd pr about it? I'll go take a look at it and = fix it up. >=20 > I'll go review the more recent mips core docs and see what's going on = too. >=20 > Thanks! >=20 >=20 > -a >=20 >=20 > On 11 December 2015 at 08:02, Stanislav Galabov <sgalabov@gmail.com> = wrote: >> Hi all, >>=20 >> It seems that MIPS_CONFIG0_VI is defined wrong in = sys/mips/include/cpuregs.h. >>=20 >> According to MIPS=C2=AE Architecture For Programmers Volume III, page = 149, Figure 9-29 (Config Register Format), accessed via = http://www.t-es-t.hu/download/mips/md00090c.pdf, bit 3 of config0 is = supposed to be VI (Virtual Instruction Cache), while the current = definition of MIPS_CONFIG0_VI (0x00000004) implies that it=E2=80=99s bit = 2. >>=20 >> This leads to a lot of headaches when trying to bring up a new CPU = (1004KC in my case) and trying to use Cachable-Coherent CCA (0x5 or = 0b101) for Kseg0 :-) >> I guess we=E2=80=99ve been able to get away with this so far due to = mainly 2 things: >> 1. CPUs that use CCA 0x4 - 0x7 for Kseg0 usually are cache-coherent = anyway, so their cache ops are most likely no-op. >> 2. CPUs that use CCA 0x0 - 0x3 for Kseg0 work just fine, as bit 2 is = not set :-) >>=20 >> This leads to improper detection of the I-Cache type (it=E2=80=99s = detected as virtual when it actually isn=E2=80=99t) on kernels that use = CCA >=3D 0x4 for Kseg0, which, in turn, leads to a lot of fun trying to = figure out what=E2=80=99s wrong and why things work with CCA 0x3 and not = with 0x5 on a single core... >> After changing the definition of MIPS_CONFIG0_VI from 0x00000004 to = 0x00000008 everything goes back to normal even with CCA 0x5. >>=20 >> I would appreciate it if someone would commit this change (if you = guys think it=E2=80=99s necessary). I would do it myself if I but I have = no commit privileges. >>=20 >> Best wishes, >> Stanislav >> _______________________________________________ >> freebsd-mips@freebsd.org mailing list >> https://lists.freebsd.org/mailman/listinfo/freebsd-mips >> To unsubscribe, send any mail to = "freebsd-mips-unsubscribe@freebsd.org"
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