From owner-svn-src-stable@freebsd.org Wed Dec 12 12:26:02 2018 Return-Path: Delivered-To: svn-src-stable@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 45903130B997; Wed, 12 Dec 2018 12:26:02 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id E0BE18F5B0; Wed, 12 Dec 2018 12:26:01 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id D6D427E8F; Wed, 12 Dec 2018 12:26:01 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id wBCCQ1ng080523; Wed, 12 Dec 2018 12:26:01 GMT (envelope-from hselasky@FreeBSD.org) Received: (from hselasky@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id wBCCQ1ef080522; Wed, 12 Dec 2018 12:26:01 GMT (envelope-from hselasky@FreeBSD.org) Message-Id: <201812121226.wBCCQ1ef080522@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: hselasky set sender to hselasky@FreeBSD.org using -f From: Hans Petter Selasky Date: Wed, 12 Dec 2018 12:26:01 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r341939 - in stable/12/sys/dev/mlx5: . mlx5_core X-SVN-Group: stable-12 X-SVN-Commit-Author: hselasky X-SVN-Commit-Paths: in stable/12/sys/dev/mlx5: . mlx5_core X-SVN-Commit-Revision: 341939 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: E0BE18F5B0 X-Spamd-Bar: / Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-0.60 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_SHORT(-0.60)[-0.601,0]; ASN(0.00)[asn:11403, ipnet:2610:1c1:1::/48, country:US] X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 12 Dec 2018 12:26:02 -0000 Author: hselasky Date: Wed Dec 12 12:26:01 2018 New Revision: 341939 URL: https://svnweb.freebsd.org/changeset/base/341939 Log: MFC r341563: mlx5: Implement support for configuring PCIe packet write ordering via a sysctl. Sponsored by: Mellanox Technologies Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_mr.c stable/12/sys/dev/mlx5/mlx5_ifc.h Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_mr.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/mlx5_mr.c Wed Dec 12 12:25:07 2018 (r341938) +++ stable/12/sys/dev/mlx5/mlx5_core/mlx5_mr.c Wed Dec 12 12:26:01 2018 (r341939) @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. + * Copyright (c) 2013-2018, Mellanox Technologies, Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -30,6 +30,11 @@ #include #include "mlx5_core.h" +static int mlx5_relaxed_ordering_write; +SYSCTL_INT(_hw_mlx5, OID_AUTO, relaxed_ordering_write, CTLFLAG_RWTUN, + &mlx5_relaxed_ordering_write, 0, + "Set to enable relaxed ordering for PCIe writes"); + void mlx5_init_mr_table(struct mlx5_core_dev *dev) { struct mlx5_mr_table *table = &dev->priv.mr_table; @@ -63,6 +68,14 @@ int mlx5_core_create_mkey_cb(struct mlx5_core_dev *dev mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry); MLX5_SET(create_mkey_in, in, opcode, MLX5_CMD_OP_CREATE_MKEY); MLX5_SET(mkc, mkc, mkey_7_0, key); + + if (mlx5_relaxed_ordering_write != 0) { + if (MLX5_CAP_GEN(dev, relaxed_ordering_write)) + MLX5_SET(mkc, mkc, relaxed_ordering_write, 1); + else + return (-EPROTONOSUPPORT); + } + if (callback) return mlx5_cmd_exec_cb(dev, in, inlen, out, outlen, callback, context); Modified: stable/12/sys/dev/mlx5/mlx5_ifc.h ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_ifc.h Wed Dec 12 12:25:07 2018 (r341938) +++ stable/12/sys/dev/mlx5/mlx5_ifc.h Wed Dec 12 12:26:01 2018 (r341939) @@ -933,7 +933,8 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 log_max_cq[0x5]; u8 log_max_eq_sz[0x8]; - u8 reserved_6[0x2]; + u8 relaxed_ordering_write[1]; + u8 reserved_6[0x1]; u8 log_max_mkey[0x6]; u8 reserved_7[0xc]; u8 log_max_eq[0x4]; @@ -2424,9 +2425,13 @@ enum { }; struct mlx5_ifc_mkc_bits { - u8 reserved_0[0x1]; + u8 reserved_at_0[0x1]; u8 free[0x1]; - u8 reserved_1[0xd]; + u8 reserved_at_2[0x1]; + u8 access_mode_4_2[0x3]; + u8 reserved_at_6[0x7]; + u8 relaxed_ordering_write[0x1]; + u8 reserved_at_e[0x1]; u8 small_fence_on_rdma_read_response[0x1]; u8 umr_en[0x1]; u8 a[0x1];