From owner-svn-src-head@freebsd.org Thu Mar 24 00:24:09 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 11845ADB7C8; Thu, 24 Mar 2016 00:24:09 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id AB81613AC; Thu, 24 Mar 2016 00:24:08 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u2O0O72L064091; Thu, 24 Mar 2016 00:24:07 GMT (envelope-from jhb@FreeBSD.org) Received: (from jhb@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u2O0O7v1064087; Thu, 24 Mar 2016 00:24:07 GMT (envelope-from jhb@FreeBSD.org) Message-Id: <201603240024.u2O0O7v1064087@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhb set sender to jhb@FreeBSD.org using -f From: John Baldwin Date: Thu, 24 Mar 2016 00:24:07 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r297218 - in head/sys: amd64/amd64 i386/i386 x86/x86 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Mar 2016 00:24:09 -0000 Author: jhb Date: Thu Mar 24 00:24:07 2016 New Revision: 297218 URL: https://svnweb.freebsd.org/changeset/base/297218 Log: Enable interrupts on the BSP once all PICs are initialized. This moves the enabling of interrupts slightly earlier (the old location was still before devices were enumerated and probed) and does it in the interrupt code (rather than in the device configuration code). This also avoids tripping over an assertion on the first TLB shootdown with earlier AP startup. Reviewed by: kib Sponsored by: Netflix Differential Revision: https://reviews.freebsd.org/D5710 Modified: head/sys/amd64/amd64/autoconf.c head/sys/i386/i386/autoconf.c head/sys/x86/x86/intr_machdep.c Modified: head/sys/amd64/amd64/autoconf.c ============================================================================== --- head/sys/amd64/amd64/autoconf.c Wed Mar 23 22:07:13 2016 (r297217) +++ head/sys/amd64/amd64/autoconf.c Thu Mar 24 00:24:07 2016 (r297218) @@ -100,13 +100,6 @@ configure(dummy) void *dummy; { - /* - * Enable interrupts on the processor. The interrupts are still - * disabled in the interrupt controllers until interrupt handlers - * are registered. - */ - enable_intr(); - /* initialize new bus architecture */ root_bus_configure(); Modified: head/sys/i386/i386/autoconf.c ============================================================================== --- head/sys/i386/i386/autoconf.c Wed Mar 23 22:07:13 2016 (r297217) +++ head/sys/i386/i386/autoconf.c Thu Mar 24 00:24:07 2016 (r297218) @@ -101,13 +101,6 @@ configure(dummy) void *dummy; { - /* - * Enable interrupts on the processor. The interrupts are still - * disabled in the interrupt controllers until interrupt handlers - * are registered. - */ - enable_intr(); - /* initialize new bus architecture */ root_bus_configure(); Modified: head/sys/x86/x86/intr_machdep.c ============================================================================== --- head/sys/x86/x86/intr_machdep.c Wed Mar 23 22:07:13 2016 (r297217) +++ head/sys/x86/x86/intr_machdep.c Thu Mar 24 00:24:07 2016 (r297218) @@ -393,6 +393,21 @@ intr_init(void *dummy __unused) } SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL); +static void +intr_init_final(void *dummy __unused) +{ + + /* + * Enable interrupts on the BSP after all of the interrupt + * controllers are initialized. Device interrupts are still + * disabled in the interrupt controllers until interrupt + * handlers are registered. Interrupts are enabled on each AP + * after their first context switch. + */ + enable_intr(); +} +SYSINIT(intr_init_final, SI_SUB_INTR, SI_ORDER_ANY, intr_init_final, NULL); + #ifndef DEV_ATPIC /* Initialize the two 8259A's to a known-good shutdown state. */ void