From owner-freebsd-hardware Fri Jul 2 4:42:33 1999 Delivered-To: freebsd-hardware@freebsd.org Received: from mta2-rme.xtra.co.nz (unknown [203.96.92.3]) by hub.freebsd.org (Postfix) with ESMTP id B08F714EB6 for ; Fri, 2 Jul 1999 04:42:29 -0700 (PDT) (envelope-from junkmale@pop3.xtra.co.nz) Received: from wocker ([210.55.152.13]) by mta2-rme.xtra.co.nz (InterMail v4.01.01.00 201-229-111) with SMTP id <19990702114513.RXJC112692.mta2-rme@wocker>; Fri, 2 Jul 1999 23:45:13 +1200 From: "Dan Langille" Organization: The FreeBSD Diary To: Tom Embt Date: Fri, 2 Jul 1999 23:42:48 +1200 MIME-Version: 1.0 Content-type: text/plain; charset=US-ASCII Content-transfer-encoding: 7BIT Subject: Re: dual CPU compatibility issues Reply-To: junkmale@xtra.co.nz Cc: freebsd-hardware@freebsd.org In-reply-to: <3.0.3.32.19990702002317.007170bc@mail.embt.com> References: <377c2652.750a.0@actrix.gen.nz> X-mailer: Pegasus Mail for Win32 (v3.01d) Message-Id: <19990702114513.RXJC112692.mta2-rme@wocker> Sender: owner-freebsd-hardware@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.org On 2 Jul 99, at 0:23, Tom Embt wrote: > At 02:39 PM 7/2/99 nzst, you wrote: > >I have an old DEC box which supports a dual processor setup. I've obtained a > >Pentium 120 chip (the maximum speed supported by this box). I'm in the > process > >of tracking down another P120. > > > >How compatible does the second CPU have to be with the first? Is it enough > >to be another Pentium 120? Do they have to be from the same batch or > something? > > Not just any CPU will work! > > The CPU's should be the same stepping number, and preferably be type "SSS" > CPUs (the last S is crucial). In the early-mid Pentium days, Intel had > some difficulty manufacturing perfect chips, and thus sold some of the > imperfect chips with certain restrictions on core voltage, timings, and > (you got it!) SMP capability. > > Following a very productive (read: lucky) search on infoseek, it looks like > you'll be wanting a SY033, SK110, or Q0776. If your board requires > 82498/82493 or 82497/82492 compliant cache timings then the SK110 and Q0776 > may not work. The good news is that all SMP-capable 120's are of the same > stepping number, and should interoperate (aside from the above mentioned > cache limitation). Ummmm, I may be out of luck. This is what's on the bottom of the chip: A5451644AA MALAY CS BP80502120 SU033/VMU > > See the following links for more info: I'll check those over the weekend. Thanks. -- Dan Langille - DVL Software Limited The FreeBSD Diary - http://www.FreeBSDDiary.org/freebsd/ NZ FreeBSD User Group - http://www.nzfug.nz.freebsd.org/ The Racing System - http://www.racingsystem.com/racingsystem.htm To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hardware" in the body of the message