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Date:      Fri, 31 Oct 2003 15:55:13 -0800 (PST)
From:      Peter Wemm <peter@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 41027 for review
Message-ID:  <200310312355.h9VNtDQq032177@repoman.freebsd.org>

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http://perforce.freebsd.org/chv.cgi?CH=41027

Change 41027 by peter@peter_daintree on 2003/10/31 15:55:10

	p4 integ -b smp_hammer -I (indirect integrate)

Affected files ...

.. //depot/projects/hammer/sys/amd64/acpica/madt.c#9 integrate
.. //depot/projects/hammer/sys/amd64/amd64/apic_vector.s#10 integrate
.. //depot/projects/hammer/sys/amd64/amd64/io_apic.c#10 integrate
.. //depot/projects/hammer/sys/amd64/amd64/local_apic.c#13 integrate
.. //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#19 integrate
.. //depot/projects/hammer/sys/amd64/amd64/mptable.c#5 integrate
.. //depot/projects/hammer/sys/amd64/isa/atpic.c#9 integrate
.. //depot/projects/hammer/sys/jhb_notes#7 integrate

Differences ...

==== //depot/projects/hammer/sys/amd64/acpica/madt.c#9 (text+ko) ====

@@ -31,6 +31,7 @@
 #include <sys/bus.h>
 #include <sys/kernel.h>
 #include <sys/malloc.h>
+#include <sys/smp.h>
 
 #include <vm/vm.h>
 #include <vm/vm_param.h>
@@ -62,9 +63,9 @@
 } ioapics[NIOAPICS];
 
 struct lapic_info {
-	int la_present:1;
-	int la_enabled:1;
-	int la_apic_id:8;
+	u_int la_present:1;
+	u_int la_enabled:1;
+	u_int la_apic_id:8;
 } lapics[NLAPICS + 1];
 
 static APIC_TABLE *madt;
@@ -197,11 +198,6 @@
 	 */
 	if (AcpiOsGetRootPointer(ACPI_LOGICAL_ADDRESSING, &rsdp_ptr) != AE_OK)
 		return (ENXIO);
-	/* XXXTEST */
-	printf("rsdp_ptr.Pointer.Logical = %p\n",
-	    (void *)rsdp_ptr.Pointer.Logical);
-	printf("rsdp_ptr.Pointer.Physical = 0x%jx\n",
-	    (uintmax_t)rsdp_ptr.Pointer.Physical);
 #ifdef __i386__
 	KASSERT(rsdp_ptr.Pointer.Physical < KERNLOAD, ("RSDP too high"));
 #endif
@@ -218,8 +214,6 @@
 	 * Page 0 is used to map in the headers of candidate ACPI tables.
 	 */
 	if (rsdp->Revision >= 2) {
-		/* XXXTEST */
-		printf("XSDT PA = 0x%jx\n", (uintmax_t)rsdp->XsdtPhysicalAddress);
 		xsdt = madt_map_table(rsdp->XsdtPhysicalAddress, 1, XSDT_SIG);
 		if (xsdt == NULL) {
 			if (bootverbose)
@@ -233,8 +227,6 @@
 				break;
 		madt_unmap_table(xsdt);
 	} else {
-		/* XXXTEST */
-		printf("RSDT PA = 0x%jx\n", (uintmax_t)rsdp->RsdtPhysicalAddress);
 		rsdt = madt_map_table(rsdp->RsdtPhysicalAddress, 1, RSDT_SIG);
 		if (rsdt == NULL) {
 			if (bootverbose)
@@ -531,9 +523,9 @@
 	void *ioapic;
 	u_int pin;
 
-	/* XXXTEST */
-	printf("MADT: intr override: source %u, irq %u\n", intr->Source,
-	    intr->GlobalSystemInterrupt);
+	if (bootverbose)
+		printf("MADT: intr override: source %u, irq %u\n",
+		    intr->Source, intr->GlobalSystemInterrupt);
 	KASSERT(intr->Bus == 0, ("bus for interrupt overrides must be zero"));
 	if (madt_find_interrupt(intr->GlobalSystemInterrupt,
 	    &ioapic, &pin) != 0) {
@@ -623,3 +615,36 @@
 		break;
 	}
 }
+
+/*
+ * Setup per-CPU ACPI IDs.
+ */
+static void
+madt_set_ids(void *dummy)
+{
+	struct pcpu *pc;
+	u_int i, j;
+
+	if (madt == NULL)
+		return;
+	for (i = 0; i < MAXCPU; i++) {
+		if (CPU_ABSENT(i))
+			continue;
+		pc = pcpu_find(i);
+		KASSERT(pc != NULL, ("no pcpu data for CPU %d", i));
+		for (j = 0; j < NLAPICS + 1; j++) {
+			if (!lapics[j].la_present || !lapics[j].la_enabled)
+				continue;
+			if (lapics[j].la_apic_id == pc->pc_apic_id) {
+				pc->pc_acpi_id = j;
+				if (bootverbose)
+					printf("APIC: CPU %u has ACPI ID %u\n",
+					    i, j);
+				break;
+			}
+		}
+		if (pc->pc_acpi_id == -1)
+			panic("Unable to find ACPI ID for CPU %d", i);
+	}
+}
+SYSINIT(madt_set_ids, SI_SUB_CPU, SI_ORDER_ANY, madt_set_ids, NULL)

==== //depot/projects/hammer/sys/amd64/amd64/apic_vector.s#10 (text+ko) ====

@@ -42,6 +42,7 @@
 
 #include <machine/asmacros.h>
 #include <machine/apicreg.h>
+#include <machine/smptests.h>
 
 #include "assym.s"
 

==== //depot/projects/hammer/sys/amd64/amd64/io_apic.c#10 (text+ko) ====

@@ -85,6 +85,15 @@
  * IO APIC has a contiguous chunk of the System Interrupt address space.
  */
 
+/*
+ * Direct the ExtINT pin on the first I/O APIC to a logical cluster of
+ * CPUs rather than a physical destination of just the BSP.
+ *
+ * Note: This is disabled by default as test systems seem to croak with it
+ * enabled.
+#define ENABLE_EXTINT_LOGICAL_DESTINATION
+ */
+
 struct ioapic_intsrc {
 	struct intsrc io_intsrc;
 	int io_intpin:8;
@@ -207,13 +216,15 @@
 	    ("intpin not assigned to a cluster"));
 	KASSERT(intpin->io_dest != DEST_EXTINT,
 	    ("intpin routed via ExtINT"));
-	/* XXXTEST */
-	printf("ioapic%u: routing intpin %u (", io->io_id, intpin->io_intpin);
-	if (intpin->io_vector == VECTOR_EXTINT)
-		printf("ExtINT");
-	else
-		printf("IRQ %u", intpin->io_vector);
-	printf(") to cluster %u\n", intpin->io_dest);
+	if (bootverbose) {
+		printf("ioapic%u: routing intpin %u (", io->io_id,
+		    intpin->io_intpin);
+		if (intpin->io_vector == VECTOR_EXTINT)
+			printf("ExtINT");
+		else
+			printf("IRQ %u", intpin->io_vector);
+		printf(") to cluster %u\n", intpin->io_dest);
+	}
 	mtx_lock_spin(&icu_lock);
 	value = ioapic_read(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin));
 	value &= ~IOART_DESTMOD;
@@ -316,13 +327,10 @@
 	struct ioapic *io;
 	struct ioapic_intsrc *intpin;
 	volatile ioapic_t *apic;
-	uintptr_t poffs;
 	u_int numintr, i;
 	uint32_t value;
 
-	poffs = addr - trunc_page(addr);
-	apic = (ioapic_t *)((char *)pmap_mapdev(addr - poffs,
-				poffs + IOAPIC_MEM_REGION) + poffs);
+	apic = (ioapic_t *)pmap_mapdev(addr, IOAPIC_MEM_REGION);
 	mtx_lock_spin(&icu_lock);
 	numintr = ((ioapic_read(apic, IOAPIC_VER) & IOART_VER_MAXREDIR) >>
 	    MAXREDIRSHIFT) + 1;
@@ -429,9 +437,7 @@
 	if (io->io_pins[pin].io_vector == VECTOR_DISABLED)
 		return (EINVAL);
 	io->io_pins[pin].io_vector = VECTOR_DISABLED;
-#if 0
 	if (bootverbose)
-#endif
 		printf("ioapic%u: intpin %d disabled\n", io->io_id, pin);
 	return (0);
 }
@@ -447,9 +453,7 @@
 	if (io->io_pins[pin].io_vector < 0)
 		return (EINVAL);
 	io->io_pins[pin].io_vector = vector;
-#if 0
 	if (bootverbose)
-#endif
 		printf("ioapic%u: Routing IRQ %d -> intpin %d\n", io->io_id,
 		    vector, pin);
 	return (0);
@@ -469,9 +473,7 @@
 	io->io_pins[pin].io_masked = 0;
 	io->io_pins[pin].io_edgetrigger = 1;
 	io->io_pins[pin].io_activehi = 1;
-#if 0
 	if (bootverbose)
-#endif
 		printf("ioapic%u: Routing NMI -> intpin %d\n",
 		    io->io_id, pin);
 	return (0);
@@ -491,9 +493,7 @@
 	io->io_pins[pin].io_masked = 0;
 	io->io_pins[pin].io_edgetrigger = 1;
 	io->io_pins[pin].io_activehi = 1;
-#if 0
 	if (bootverbose)
-#endif
 		printf("ioapic%u: Routing SMI -> intpin %d\n",
 		    io->io_id, pin);
 	return (0);
@@ -513,9 +513,7 @@
 	io->io_pins[pin].io_masked = 0;
 	io->io_pins[pin].io_edgetrigger = 1;
 	io->io_pins[pin].io_activehi = 1;
-#if 0
 	if (bootverbose)
-#endif
 		printf("ioapic%u: Routing external 8259A's -> intpin %d\n",
 		    io->io_id, pin);
 	return (0);
@@ -578,7 +576,7 @@
 	for (i = 0, pin = io->io_pins; i < io->io_numintr; i++, pin++) {
 		/*
 		 * Finish initializing the pins by programming the vectors
-		 * and delivery mode.  XXX this may not be all right yet
+		 * and delivery mode.
 		 */
 		if (pin->io_vector == VECTOR_DISABLED)
 			continue;
@@ -623,7 +621,6 @@
 		 */
 		flags = ioapic_read(apic, IOAPIC_REDTBL_HI(i));
 		flags &= ~IOART_DEST;
-		KASSERT(PCPU_GET(apic_id) == lapic_id(), ("APIC ID mismatch"));	/* XXXTEST */
 		flags |= PCPU_GET(apic_id) << APIC_ID_SHIFT;
 		ioapic_write(apic, IOAPIC_REDTBL_HI(i), flags);
 		mtx_unlock_spin(&icu_lock);
@@ -654,8 +651,7 @@
 	STAILQ_FOREACH(io, &ioapic_list, io_next)
 	    for (i = 0; i < io->io_numintr; i++)
 		    if (io->io_pins[i].io_dest != DEST_NONE &&
-			io->io_pins[i].io_dest != DEST_EXTINT &&
-			io->io_pins[i].io_vector != VECTOR_EXTINT /* XXXTEST */)
+			io->io_pins[i].io_dest != DEST_EXTINT)
 			    ioapic_program_destination(&io->io_pins[i]);
 }
 SYSINIT(ioapic_destinations, SI_SUB_SMP, SI_ORDER_SECOND,
@@ -685,8 +681,7 @@
 	extint = &io->io_pins[0];
 	if (extint->io_vector != VECTOR_EXTINT)
 		panic("Can't find ExtINT pin to route through!");
-#if 0
-	/* XXXTEST? */
+#ifdef ENABLE_EXTINT_LOGICAL_DESTINATION
 	if (extint->io_dest == DEST_NONE)
 		ioapic_assign_cluster(extint);
 #endif

==== //depot/projects/hammer/sys/amd64/amd64/local_apic.c#13 (text+ko) ====

@@ -266,9 +266,6 @@
 	lapic->dfr = value;
 
 	/* Set this APIC's logical ID. */
-	/* XXXTEST */
-	printf("cpu %d: Programming physical ID %u to cluster %u, ID %u\n",
-	    PCPU_GET(cpuid), lapic_id(), la->la_cluster, la->la_cluster_id);
 	value = lapic->ldr;
 	value &= ~APIC_ID_MASK;
 	value |= (la->la_cluster << APIC_ID_CLUSTER_SHIFT |
@@ -342,17 +339,20 @@
 
 	if (pin > LVT_MAX)
 		return (EINVAL);
-	if (apic_id == APIC_ID_ALL)
+	if (apic_id == APIC_ID_ALL) {
 		lvts[pin].lvt_masked = masked;
-	else {
+		if (bootverbose)
+			printf("lapic:");
+	} else {
 		KASSERT(lapics[apic_id].la_present,
 		    ("%s: missing APIC %u", __func__, apic_id));
 		lapics[apic_id].la_lvts[pin].lvt_masked = masked;
 		lapics[apic_id].la_lvts[pin].lvt_active = 1;
+		if (bootverbose)
+			printf("lapic%u:", apic_id);
 	}
-	/* XXXTEST */
-	printf("lapic%u: LINT%u %s\n", apic_id, pin,
-	    masked ? "masked" : "unmasked");
+	if (bootverbose)
+		printf(" LINT%u %s\n", pin, masked ? "masked" : "unmasked");
 	return (0);
 }
 
@@ -363,14 +363,17 @@
 
 	if (pin > LVT_MAX)
 		return (EINVAL);
-	if (apic_id == APIC_ID_ALL)
+	if (apic_id == APIC_ID_ALL) {
 		lvt = &lvts[pin];
-	else {
+		if (bootverbose)
+			printf("lapic:");
+	} else {
 		KASSERT(lapics[apic_id].la_present,
 		    ("%s: missing APIC %u", __func__, apic_id));
 		lvt = &lapics[apic_id].la_lvts[pin];
 		lvt->lvt_active = 1;
-		
+		if (bootverbose)
+			printf("lapic%u:", apic_id);
 	}
 	lvt->lvt_mode = mode;
 	switch (mode) {
@@ -388,23 +391,24 @@
 	default:
 		panic("Unsupported delivery mode: 0x%x\n", mode);
 	}
-	/* XXXTEST */
-	printf("lapic%u: Routing ", apic_id);
-	switch (mode) {
-	case APIC_LVT_DM_NMI:
-		printf("NMI");
-		break;
-	case APIC_LVT_DM_SMI:
-		printf("SMI");
-		break;
-	case APIC_LVT_DM_INIT:
-		printf("INIT");
-		break;
-	case APIC_LVT_DM_EXTINT:
-		printf("ExtINT");
-		break;
+	if (bootverbose) {
+		printf(" Routing ");
+		switch (mode) {
+		case APIC_LVT_DM_NMI:
+			printf("NMI");
+			break;
+		case APIC_LVT_DM_SMI:
+			printf("SMI");
+			break;
+		case APIC_LVT_DM_INIT:
+			printf("INIT");
+			break;
+		case APIC_LVT_DM_EXTINT:
+			printf("ExtINT");
+			break;
+		}
+		printf(" -> LINT%u\n", pin);
 	}
-	printf(" -> LINT%u\n", pin);
 	return (0);
 }
 
@@ -414,17 +418,21 @@
 
 	if (pin > LVT_MAX)
 		return (EINVAL);
-	if (apic_id == APIC_ID_ALL)
+	if (apic_id == APIC_ID_ALL) {
 		lvts[pin].lvt_activehi = activehi;
-	else {
+		if (bootverbose)
+			printf("lapic:");
+	} else {
 		KASSERT(lapics[apic_id].la_present,
 		    ("%s: missing APIC %u", __func__, apic_id));
 		lapics[apic_id].la_lvts[pin].lvt_active = 1;
 		lapics[apic_id].la_lvts[pin].lvt_activehi = activehi;
+		if (bootverbose)
+			printf("lapic%u:", apic_id);
 	}
-	/* XXXTEST */
-	printf("lapic%u: LINT%u polarity: active-%s\n", apic_id, pin,
-	    activehi ? "hi" : "lo");
+	if (bootverbose)
+		printf(" LINT%u polarity: active-%s\n", pin,
+		    activehi ? "hi" : "lo");
 	return (0);
 }
 
@@ -434,17 +442,21 @@
 
 	if (pin > LVT_MAX)
 		return (EINVAL);
-	if (apic_id == APIC_ID_ALL)
+	if (apic_id == APIC_ID_ALL) {
 		lvts[pin].lvt_edgetrigger = edgetrigger;
-	else {
+		if (bootverbose)
+			printf("lapic:");
+	} else {
 		KASSERT(lapics[apic_id].la_present,
 		    ("%s: missing APIC %u", __func__, apic_id));
 		lapics[apic_id].la_lvts[pin].lvt_edgetrigger = edgetrigger;
 		lapics[apic_id].la_lvts[pin].lvt_active = 1;
+		if (bootverbose)
+			printf("lapic%u:", apic_id);
 	}
-	/* XXXTEST */
-	printf("lapic%u: LINT%u trigger: %s\n", apic_id, pin,
-	    edgetrigger ? "edge" : "level");
+	if (bootverbose)
+		printf(" LINT%u trigger: %s\n", pin,
+		    edgetrigger ? "edge" : "level");
 	return (0);
 }
 
@@ -538,16 +550,12 @@
 		}
 	}
 	if (best_enum == NULL) {
-#if 0
 		if (bootverbose)
-#endif
 			printf("APIC: Could not find any APICs.\n");
 		return;
 	}
 
-#if 0
 	if (bootverbose)
-#endif
 		printf("APIC: Using the %s enumerator.\n",
 		    best_enum->apic_name);
 
@@ -597,9 +605,7 @@
 	 * properly program the LINT pins.
 	 */
 	lapic_setup();
-#if 0
 	if (bootverbose)
-#endif
 		lapic_dump("BSP");
 }
 SYSINIT(apic_setup_io, SI_SUB_INTR, SI_ORDER_SECOND, apic_setup_io, NULL)

==== //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#19 (text+ko) ====

@@ -268,7 +268,6 @@
 	mtx_init(&smp_tlb_mtx, "tlb", NULL, MTX_SPIN);
 
 	/* Set boot_cpu_id if needed. */
-	KASSERT(PCPU_GET(apic_id) == lapic_id(), ("APIC ID mismatch"));	/* XXXTEST */
 	if (boot_cpu_id == -1) {
 		boot_cpu_id = PCPU_GET(apic_id);
 		cpu_info[boot_cpu_id].cpu_bsp = 1;
@@ -445,9 +444,9 @@
 			cluster_id = 0;
 		} else
 			cluster_id++;
-		/* XXXTEST */
-		printf("APIC ID: physical %u, logical %u:%u\n", apic_id,
-		    cluster, cluster_id);
+		if (bootverbose)
+			printf("APIC ID: physical %u, logical %u:%u\n",
+			    apic_id, cluster, cluster_id);
 		lapic_set_logical_id(apic_id, cluster, cluster_id);
 	}
 }

==== //depot/projects/hammer/sys/amd64/amd64/mptable.c#5 (text+ko) ====

@@ -267,9 +267,7 @@
 			    mpct->signature[2], mpct->signature[3]);
 			return (ENXIO);
 		}
-#if 0
 		if (bootverbose)
-#endif
 			printf(
 			"MP Configuration Table version 1.%d found at %p\n",
 			    mpct->spec_rev, mpct);
@@ -820,9 +818,7 @@
 	while ((id = ffs(id_mask)) != 0) {
 		id--;
 		for (i = id + 1; i < id + logical_cpus; i++) {
-#if 0
 			if (bootverbose)
-#endif
 				printf(
 			"MPTable: Adding logical CPU %d from main CPU %d\n",
 				    i, id);

==== //depot/projects/hammer/sys/amd64/isa/atpic.c#9 (text+ko) ====

@@ -33,6 +33,7 @@
  * PIC driver for the 8259A Master and Slave PICs in PC/AT machines.
  */
 
+#include "opt_auto_eoi.h"
 #include "opt_isa.h"
 
 #include <sys/param.h>
@@ -300,10 +301,6 @@
 	intr_execute_handlers(isrc, &iframe);
 }
 
-/*
- * Older stuff that is not cleaned up yet.
- */
-
 #ifdef DEV_ISA
 /*
  * Return a bitmap of the current interrupt requests.  This is 8259-specific

==== //depot/projects/hammer/sys/jhb_notes#7 (text+ko) ====

@@ -49,6 +49,8 @@
 + Fix bogus SMP probe when only 1 CPU
 - Kill isa_irq_pending()  (maybe, is this an MI function?)
 + Add ACPI MADT APIC enumerator.
+  - Use APIC ID's for index in lapics[] array instead of ACPI IDs, ACPI
+    IDs are not guaranteed to be non-sparse
   + solve ACPI module problem where madt wants APIC symbols :(
     (this is gross)
   - doesn't work when loaded as a module
@@ -66,6 +68,7 @@
   NO_MIXED_MODE
   + Add NO_MIXED_MODE option
   - Add runtime decision for IRQ0 mixed mode?
+  - Don't use mixed mode with MADT?
 + SMP bogons
   + doesn't work on 750x
   + pmap_lazyfix unhappy with old-style critical sections
@@ -73,7 +76,6 @@
 - Perhaps change the IRQ resource manager such that it starts out empty
   and a resource entry for each IRQ is added as each IRQ is registered
 - Clean up includes in new files.
-- Check #ifdef's in new files and look for #if 0 in new code
 - Add handling of local APIC ERROR lvt.
 - Use the local apic timer to drive hard/stat/profclock (maybe too hard)
 - Do we need to be able to renumber I/O APICs?
@@ -84,9 +86,12 @@
     it was a BIOS bug.  May have to bump NAPICID to 256 though.
 - Flesh out cpu topology map
 - Suspend/resume support for I/O APICs
-- check XXX and XXXTEST in new code
 - reimplement lazy masking of interrupts for critical sections w/o bitmasks??
 - Enhance acpi_cpu(4) driver to grok SMP at all?
+  - njl doing this
+  - add per-CPU ACPI IDs
+    + works for SMP
+    - doesn't get set for UP case
 - Rip out CPU halting stuff perhaps and maybe disable MPTable HTT fixup?
 - Support bus_config_intr()?
   - nexus would have to call intr_config_source()



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