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Date:      Fri, 11 Apr 1997 13:13:06 -0500
From:      Jonathan Lemon <jlemon@americantv.com>
To:        John Utz <spaz@u.washington.edu>
Cc:        Michael Hancock <michaelh@cet.co.jp>, Darren Reed <avalon@coombs.anu.edu.au>, Terry Lambert <terry@lambert.org>, hackers@FreeBSD.ORG
Subject:   Re: 430TX ?
Message-ID:  <19970411131306.11780@right.PCS>
In-Reply-To: <Pine.OSF.3.95.970411094154.31682B-100000@becker2.u.washington.edu>; from John Utz on Apr 04, 1997 at 09:46:26AM -0700
References:  <Pine.SV4.3.95.970411165742.6102A-100000@parkplace.cet.co.jp> <Pine.OSF.3.95.970411094154.31682B-100000@becker2.u.washington.edu>

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On Apr 04, 1997 at 09:46:26AM -0700, John Utz wrote:
>
> 	my instructor claims they separated the cache into instruction
> cache and data-cache.....a previously 'discredited' architecture known to

Discredited?  Since when?  All other things being equal, separate I+D caches
almost always outperform merged caches.  


> traditional 'von neumann' or 'princeton' architecture.... is cache space
> relatively cheap these days?

Memory (and hence caches) have gotten much cheaper recently, but that doesn't
mean that multiplying the size of your cache is instantly going to give you
improved performance.
--
Jonathan



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