From owner-p4-projects@FreeBSD.ORG Mon Jan 28 19:46:56 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id E359016A47A; Mon, 28 Jan 2008 19:46:55 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9047916A473 for ; Mon, 28 Jan 2008 19:46:55 +0000 (UTC) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 8086D13C465 for ; Mon, 28 Jan 2008 19:46:55 +0000 (UTC) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m0SJktBv016018 for ; Mon, 28 Jan 2008 19:46:55 GMT (envelope-from imp@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m0SJktjb016015 for perforce@freebsd.org; Mon, 28 Jan 2008 19:46:55 GMT (envelope-from imp@freebsd.org) Date: Mon, 28 Jan 2008 19:46:55 GMT Message-Id: <200801281946.m0SJktjb016015@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to imp@freebsd.org using -f From: Warner Losh To: Perforce Change Reviews Cc: Subject: PERFORCE change 134314 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 28 Jan 2008 19:46:56 -0000 http://perforce.freebsd.org/chv.cgi?CH=134314 Change 134314 by imp@imp_lighthouse on 2008/01/28 19:46:51 When we turn on the COP 1 enable bit, make sure that it turns on before accessing the FPU. In the CPU_NOFPU case, this won't be done, but is needed for those platforms that have to support CPUs with and without math co-processor support. Chances are that CPU_NOFPU turns off other stuff that will kill us later in the boot process, but for now this allows the early startup code to be as agnostic as possible at the cost of a few insturctions. Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/mips/locore.S#12 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/mips/locore.S#12 (text+ko) ==== @@ -126,11 +126,16 @@ mtc0 t2, MIPS_COP_0_STATUS COP0_SYNC /* Extra nops for the FPU to spin up. */ + mfc0 t2, MIPS_COP_0_STATUS /* Read and store the PrID FPU ID for CPU identification. */ mfc0 t0, MIPS_COP_0_PRID #ifndef CPU_NOFPU + and t2, MIPS_SR_COP_1_BIT + beqz t2, 1f + li t1, 0x0 cfc1 t1, MIPS_FPU_ID +1: #else /* * This platform has no FPU, and attempting to detect one @@ -202,13 +207,6 @@ la sp, _C_LABEL(thread0) lw a0, TD_PCB(sp) subu sp, a0, START_FRAME - mfc0 t1, COP_0_CONFIG, 1 # Check FPU present or not - andi t1, 0x1 - beqz t1, no_fpu - nop - cfc1 t1, FPC_ID # read FPU ID register - sw t1, _C_LABEL(fpu_id) # save FPU ID register -no_fpu: jal _C_LABEL(mi_startup) # mi_startup(frame) nop PANIC("Startup failed!")