From owner-svn-src-all@FreeBSD.ORG Wed Mar 16 07:04:14 2011 Return-Path: Delivered-To: svn-src-all@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 55A07106564A; Wed, 16 Mar 2011 07:04:14 +0000 (UTC) (envelope-from brde@optusnet.com.au) Received: from mail04.syd.optusnet.com.au (mail04.syd.optusnet.com.au [211.29.132.185]) by mx1.freebsd.org (Postfix) with ESMTP id DEA998FC18; Wed, 16 Mar 2011 07:04:13 +0000 (UTC) Received: from c122-107-125-80.carlnfd1.nsw.optusnet.com.au (c122-107-125-80.carlnfd1.nsw.optusnet.com.au [122.107.125.80]) by mail04.syd.optusnet.com.au (8.13.1/8.13.1) with ESMTP id p2G74AQZ016359 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 16 Mar 2011 18:04:11 +1100 Date: Wed, 16 Mar 2011 18:04:10 +1100 (EST) From: Bruce Evans X-X-Sender: bde@besplex.bde.org To: Jung-uk Kim In-Reply-To: <201103151721.42664.jkim@FreeBSD.org> Message-ID: <20110316174342.I4277@besplex.bde.org> References: <201103142205.p2EM5x6E012664@svn.freebsd.org> <201103151526.14264.jkim@FreeBSD.org> <201103151551.54196.jhb@freebsd.org> <201103151721.42664.jkim@FreeBSD.org> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Cc: svn-src-head@FreeBSD.org, svn-src-all@FreeBSD.org, src-committers@FreeBSD.org, Bruce Evans , John Baldwin Subject: Re: svn commit: r219646 - head/sys/x86/isa X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Mar 2011 07:04:14 -0000 On Tue, 15 Mar 2011, Jung-uk Kim wrote: > On Tuesday 15 March 2011 03:51 pm, John Baldwin wrote: >> On Tuesday, March 15, 2011 3:26:11 pm Jung-uk Kim wrote: >>> Now don't you think we should really kill delay by TSC? ;-) >> >> Delay by TSC fixed known deadlocks with the i8254 based DELAY() due >> to the use of locks. Be careful that you don't re-introduce old >> bugs. > > Yeah, that's perfectly understood. I don't understand it. I don't know of any deadlocks except the ones in ddb that I fixed, and there were deadlocks, they can't have been fixed by using the TSC, since the TSC is not always available. It is not even always available on systems that have a P-state invariant TSC synchronized across all CPUs, since it is not initialized early, so the old deadlock avoidance is still needed. In fact, I found the deadlock using ddb to debug TSC initialization which used the i8254 (not via DELAY()) for calibrating the TSC frequency. >> Also, you can use a TSC for DELAY() in cases when it is not safe to >> use it for the timecounter (if it is not in sync across cores, but >> is used in a machine with invariant TSCs or where the user knows >> they won't ever throttle it). Modern Intel CPUs all have invariant >> TSCs that are more or less in sync across cores, and we should >> certainly still use the TSC for DELAY() in that case. Even if they >> aren't in sync (so we can't use it for the timecounter) we should >> still use the TSC if they are invariant as it is far cheaper than >> anything else. > > That, too, is well understood. You know I added tsc_is_invariant > myself. :-) "1: [pause;] decl %eax; jne 1b" in a loop works just as well as rdtsc in a loop if the TSC is _not_ P-state invariant. Both break similarly if the TSC frequency changes. You have to change the loop count if the frequency changes, but it is hard to tell if this is necessary. Telling if it is necessary requires reading a real hardware timer to recalibrate occasionally from within the loop and without, and the timer read from within the loop gives the same locking complications that you are trying to avoid. > However, why do we need cheaper DELAY() when we trying to "delay" > something with it? kib mentioned bus activity. "1: decl %eax; jne 1b" doesn't have that. I wonder if rdtsc has it. Phenom has much slower rdtsc than Athlon to help make it P-state invariant. Does this involve bus activity? What does "pause" do in a loop that is only accessing registers? Bruce