From owner-svn-src-stable-9@freebsd.org Wed Mar 9 21:40:02 2016 Return-Path: Delivered-To: svn-src-stable-9@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 76425AC9509; Wed, 9 Mar 2016 21:40:02 +0000 (UTC) (envelope-from davidcs@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 2D59F1C0; Wed, 9 Mar 2016 21:40:02 +0000 (UTC) (envelope-from davidcs@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u29Le15c072819; Wed, 9 Mar 2016 21:40:01 GMT (envelope-from davidcs@FreeBSD.org) Received: (from davidcs@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u29Le1hC072817; Wed, 9 Mar 2016 21:40:01 GMT (envelope-from davidcs@FreeBSD.org) Message-Id: <201603092140.u29Le1hC072817@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: davidcs set sender to davidcs@FreeBSD.org using -f From: David C Somayajulu Date: Wed, 9 Mar 2016 21:40:01 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org Subject: svn commit: r296581 - in stable/9/sys: dev/bxe modules/bxe X-SVN-Group: stable-9 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable-9@freebsd.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: SVN commit messages for only the 9-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 09 Mar 2016 21:40:02 -0000 Author: davidcs Date: Wed Mar 9 21:40:00 2016 New Revision: 296581 URL: https://svnweb.freebsd.org/changeset/base/296581 Log: MFC r296071 Upgrade the firmware carried in driver and loaded during hardware initialization (a.k.a STORM firmware) to version 7.13.1 (latest version) Modified: stable/9/sys/dev/bxe/57710_init_values.c stable/9/sys/dev/bxe/57710_int_offsets.h stable/9/sys/dev/bxe/57711_init_values.c stable/9/sys/dev/bxe/57711_int_offsets.h stable/9/sys/dev/bxe/57712_init_values.c stable/9/sys/dev/bxe/57712_int_offsets.h stable/9/sys/dev/bxe/bxe.c stable/9/sys/dev/bxe/bxe.h stable/9/sys/dev/bxe/bxe_elink.c stable/9/sys/dev/bxe/bxe_elink.h stable/9/sys/dev/bxe/bxe_stats.c stable/9/sys/dev/bxe/ecore_fw_defs.h stable/9/sys/dev/bxe/ecore_hsi.h stable/9/sys/dev/bxe/ecore_init.h stable/9/sys/dev/bxe/ecore_init_ops.h stable/9/sys/dev/bxe/ecore_mfw_req.h stable/9/sys/dev/bxe/ecore_reg.h stable/9/sys/dev/bxe/ecore_sp.c stable/9/sys/dev/bxe/ecore_sp.h stable/9/sys/modules/bxe/Makefile Directory Properties: stable/9/ (props changed) stable/9/sys/ (props changed) stable/9/sys/dev/ (props changed) stable/9/sys/modules/ (props changed) Modified: stable/9/sys/dev/bxe/57710_init_values.c ============================================================================== --- stable/9/sys/dev/bxe/57710_init_values.c Wed Mar 9 21:30:21 2016 (r296580) +++ stable/9/sys/dev/bxe/57710_init_values.c Wed Mar 9 21:40:00 2016 (r296581) @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2007-2014 QLogic Corporation. All rights reserved. + * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -11,7 +11,7 @@ * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS' + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS @@ -104,19 +104,19 @@ static const struct raw_op init_ops_e1[] /* #define CFC_COMMON_START 88 */ {OP_ZR, 0x104c00, 0x100}, {OP_WR, 0x104028, 0x10}, - {OP_WR, 0x104044, 0x3fff}, + {OP_SW, 0x104040, 0x20469}, {OP_WR, 0x104058, 0x280000}, {OP_WR, 0x104084, 0x84924a}, {OP_WR, 0x104058, 0x0}, /* #define CFC_COMMON_END 89 */ /* #define CSDM_COMMON_START 110 */ - {OP_SW, 0xc2008, 0x30469}, - {OP_SW, 0xc201c, 0x4046c}, - {OP_SW, 0xc2038, 0x110470}, + {OP_SW, 0xc2008, 0x3046b}, + {OP_SW, 0xc201c, 0x4046e}, + {OP_SW, 0xc2038, 0x110472}, {OP_ZR, 0xc207c, 0x4f}, - {OP_SW, 0xc21b8, 0x110481}, + {OP_SW, 0xc21b8, 0x110483}, {OP_ZR, 0xc21fc, 0xf}, - {OP_SW, 0xc2238, 0x40492}, + {OP_SW, 0xc2238, 0x40494}, {OP_RD, 0xc2248, 0x0}, {OP_RD, 0xc224c, 0x0}, {OP_RD, 0xc2250, 0x0}, @@ -141,76 +141,76 @@ static const struct raw_op init_ops_e1[] /* #define CSDM_COMMON_END 111 */ /* #define CSEM_COMMON_START 132 */ {OP_FW, 0x200400, 0xe00000}, - {OP_WR_64, 0x200780, 0x100496}, + {OP_WR_64, 0x200780, 0x100498}, {OP_ZR, 0x220000, 0x1600}, {OP_ZR, 0x228000, 0x40}, {OP_ZR, 0x223bd0, 0x8}, {OP_ZR, 0x224800, 0x6}, - {OP_SW, 0x224818, 0x40498}, + {OP_SW, 0x224818, 0x4049a}, {OP_ZR, 0x224828, 0xc}, - {OP_SW, 0x224858, 0x4049c}, + {OP_SW, 0x224858, 0x4049e}, {OP_ZR, 0x224868, 0xc}, - {OP_SW, 0x224898, 0x404a0}, + {OP_SW, 0x224898, 0x404a2}, {OP_ZR, 0x2248a8, 0xc}, - {OP_SW, 0x2248d8, 0x404a4}, + {OP_SW, 0x2248d8, 0x404a6}, {OP_ZR, 0x2248e8, 0xc}, - {OP_SW, 0x224918, 0x404a8}, + {OP_SW, 0x224918, 0x404aa}, {OP_ZR, 0x224928, 0xc}, - {OP_SW, 0x224958, 0x404ac}, + {OP_SW, 0x224958, 0x404ae}, {OP_ZR, 0x224968, 0xc}, - {OP_SW, 0x224998, 0x404b0}, + {OP_SW, 0x224998, 0x404b2}, {OP_ZR, 0x2249a8, 0xc}, - {OP_SW, 0x2249d8, 0x404b4}, + {OP_SW, 0x2249d8, 0x404b6}, {OP_ZR, 0x2249e8, 0xc}, - {OP_SW, 0x224a18, 0x404b8}, + {OP_SW, 0x224a18, 0x404ba}, {OP_ZR, 0x224a28, 0xc}, - {OP_SW, 0x224a58, 0x404bc}, + {OP_SW, 0x224a58, 0x404be}, {OP_ZR, 0x224a68, 0xc}, - {OP_SW, 0x224a98, 0x404c0}, + {OP_SW, 0x224a98, 0x404c2}, {OP_ZR, 0x224aa8, 0xc}, - {OP_SW, 0x224ad8, 0x404c4}, + {OP_SW, 0x224ad8, 0x404c6}, {OP_ZR, 0x224ae8, 0xc}, - {OP_SW, 0x224b18, 0x404c8}, + {OP_SW, 0x224b18, 0x404ca}, {OP_ZR, 0x224b28, 0xc}, - {OP_SW, 0x224b58, 0x404cc}, + {OP_SW, 0x224b58, 0x404ce}, {OP_ZR, 0x224b68, 0xc}, - {OP_SW, 0x224b98, 0x404d0}, + {OP_SW, 0x224b98, 0x404d2}, {OP_ZR, 0x224ba8, 0xc}, - {OP_SW, 0x224bd8, 0x404d4}, + {OP_SW, 0x224bd8, 0x404d6}, {OP_ZR, 0x224be8, 0xc}, - {OP_SW, 0x224c18, 0x404d8}, + {OP_SW, 0x224c18, 0x404da}, {OP_ZR, 0x224c28, 0xc}, - {OP_SW, 0x224c58, 0x404dc}, + {OP_SW, 0x224c58, 0x404de}, {OP_ZR, 0x224c68, 0xc}, - {OP_SW, 0x224c98, 0x404e0}, + {OP_SW, 0x224c98, 0x404e2}, {OP_ZR, 0x224ca8, 0xc}, - {OP_SW, 0x224cd8, 0x404e4}, + {OP_SW, 0x224cd8, 0x404e6}, {OP_ZR, 0x224ce8, 0xc}, - {OP_SW, 0x224d18, 0x404e8}, + {OP_SW, 0x224d18, 0x404ea}, {OP_ZR, 0x224d28, 0xc}, - {OP_SW, 0x224d58, 0x404ec}, + {OP_SW, 0x224d58, 0x404ee}, {OP_ZR, 0x224d68, 0xc}, - {OP_SW, 0x224d98, 0x404f0}, + {OP_SW, 0x224d98, 0x404f2}, {OP_ZR, 0x224da8, 0xc}, - {OP_SW, 0x224dd8, 0x404f4}, + {OP_SW, 0x224dd8, 0x404f6}, {OP_ZR, 0x224de8, 0xc}, - {OP_SW, 0x224e18, 0x404f8}, + {OP_SW, 0x224e18, 0x404fa}, {OP_ZR, 0x224e28, 0xc}, - {OP_SW, 0x224e58, 0x404fc}, + {OP_SW, 0x224e58, 0x404fe}, {OP_ZR, 0x224e68, 0xc}, - {OP_SW, 0x224e98, 0x40500}, + {OP_SW, 0x224e98, 0x40502}, {OP_ZR, 0x224ea8, 0xc}, - {OP_SW, 0x224ed8, 0x40504}, + {OP_SW, 0x224ed8, 0x40506}, {OP_ZR, 0x224ee8, 0xc}, - {OP_SW, 0x224f18, 0x40508}, + {OP_SW, 0x224f18, 0x4050a}, {OP_ZR, 0x224f28, 0xc}, - {OP_SW, 0x224f58, 0x4050c}, + {OP_SW, 0x224f58, 0x4050e}, {OP_ZR, 0x224f68, 0xc}, - {OP_SW, 0x224f98, 0x40510}, + {OP_SW, 0x224f98, 0x40512}, {OP_ZR, 0x224fa8, 0xc}, - {OP_SW, 0x224fd8, 0x40514}, + {OP_SW, 0x224fd8, 0x40516}, {OP_ZR, 0x224fe8, 0x6}, - {OP_SW, 0x225198, 0x40518}, + {OP_SW, 0x225198, 0x4051a}, {OP_WR, 0x238000, 0x10}, {OP_WR, 0x238040, 0x12}, {OP_WR, 0x238080, 0x30}, @@ -227,16 +227,16 @@ static const struct raw_op init_ops_e1[] {OP_IF_MODE_AND, 2, 0x4}, /* emul */ {OP_WR, 0x238300, 0x138}, {OP_WR, 0x238340, 0x0}, - {OP_FW, 0x240000, 0x27300000}, - {OP_WR_64, 0x249cc0, 0x6ace051c}, + {OP_FW, 0x240000, 0x22600000}, + {OP_WR_64, 0x248980, 0x6d36051e}, {OP_RD, 0x200000, 0x0}, {OP_RD, 0x200004, 0x0}, {OP_RD, 0x200008, 0x0}, {OP_RD, 0x20000c, 0x0}, {OP_RD, 0x200010, 0x0}, {OP_RD, 0x200014, 0x0}, - {OP_SW, 0x200020, 0x1a051e}, - {OP_SW, 0x2000a4, 0x20538}, + {OP_SW, 0x200020, 0x1a0520}, + {OP_SW, 0x2000a4, 0x2053a}, {OP_WR, 0x200224, 0x0}, {OP_WR, 0x200234, 0x0}, {OP_WR, 0x20024c, 0x0}, @@ -259,17 +259,17 @@ static const struct raw_op init_ops_e1[] /* #define CSEM_PORT1_END 137 */ /* #define DMAE_COMMON_START 176 */ {OP_ZR, 0x102400, 0xe0}, - {OP_SW, 0x10201c, 0x2053a}, + {OP_SW, 0x10201c, 0x2053c}, {OP_WR, 0x1020c0, 0x1}, - {OP_SW, 0x102004, 0x2053c}, + {OP_SW, 0x102004, 0x2053e}, /* #define DMAE_COMMON_END 177 */ /* #define DORQ_COMMON_START 198 */ {OP_WR, 0x170008, 0x2}, {OP_WR, 0x17002c, 0x3}, - {OP_SW, 0x170038, 0x2053e}, - {OP_SW, 0x170044, 0x60540}, - {OP_SW, 0x170060, 0x50546}, - {OP_SW, 0x170078, 0x2054b}, + {OP_SW, 0x170038, 0x20540}, + {OP_SW, 0x170044, 0x60542}, + {OP_SW, 0x170060, 0x50548}, + {OP_SW, 0x170078, 0x2054d}, {OP_WR, 0x170004, 0xf}, /* #define DORQ_COMMON_END 199 */ /* #define HC_COMMON_START 220 */ @@ -280,7 +280,7 @@ static const struct raw_op init_ops_e1[] {OP_ZR, 0x108040, 0x2}, {OP_ZR, 0x108028, 0x2}, {OP_WR, 0x108038, 0x10}, - {OP_SW, 0x108040, 0x2054d}, + {OP_SW, 0x108040, 0x2054f}, {OP_WR, 0x108050, 0x0}, {OP_WR, 0x108100, 0x0}, {OP_ZR, 0x108120, 0x2}, @@ -300,7 +300,7 @@ static const struct raw_op init_ops_e1[] {OP_ZR, 0x108048, 0x2}, {OP_ZR, 0x108030, 0x2}, {OP_WR, 0x10803c, 0x10}, - {OP_SW, 0x108048, 0x2054f}, + {OP_SW, 0x108048, 0x20551}, {OP_WR, 0x108054, 0x0}, {OP_WR, 0x108104, 0x0}, {OP_ZR, 0x108128, 0x2}, @@ -318,13 +318,13 @@ static const struct raw_op init_ops_e1[] /* #define MISC_COMMON_START 264 */ {OP_WR, 0xa468, 0xaffdc}, {OP_WR, 0xa280, 0x1}, - {OP_SW, 0xa294, 0x40551}, + {OP_SW, 0xa294, 0x40553}, {OP_WR, 0xa4fc, 0xff000000}, /* #define MISC_COMMON_END 265 */ /* #define NIG_COMMON_START 286 */ - {OP_SW, 0x100b4, 0x20555}, + {OP_SW, 0x100b4, 0x20557}, {OP_WR, 0x100dc, 0x1}, - {OP_SW, 0x10100, 0x20557}, + {OP_SW, 0x10100, 0x20559}, /* #define NIG_COMMON_END 287 */ /* #define NIG_PORT0_START 288 */ {OP_WR, 0x1007c, 0x300000}, @@ -355,7 +355,7 @@ static const struct raw_op init_ops_e1[] /* #define PBF_COMMON_START 308 */ {OP_WR, 0x140000, 0x1}, {OP_WR, 0x14000c, 0x1}, - {OP_SW, 0x140040, 0x20559}, + {OP_SW, 0x140040, 0x2055b}, {OP_WR, 0x14000c, 0x0}, {OP_WR, 0x140000, 0x0}, {OP_WR, 0x14006c, 0x0}, @@ -373,16 +373,16 @@ static const struct raw_op init_ops_e1[] {OP_WR, 0x140060, 0x0}, /* #define PBF_PORT1_END 313 */ /* #define PRS_COMMON_START 352 */ - {OP_SW, 0x40004, 0x12055b}, - {OP_SW, 0x40054, 0x3056d}, + {OP_SW, 0x40004, 0x12055d}, + {OP_SW, 0x40054, 0x3056f}, {OP_WR, 0x40070, 0x4}, - {OP_SW, 0x40078, 0x40570}, + {OP_SW, 0x40078, 0x40572}, {OP_ZR, 0x40088, 0x5}, - {OP_SW, 0x4009c, 0x30574}, + {OP_SW, 0x4009c, 0x30576}, {OP_ZR, 0x400a8, 0x4}, - {OP_SW, 0x400b8, 0x50577}, + {OP_SW, 0x400b8, 0x50579}, {OP_ZR, 0x400cc, 0x4}, - {OP_SW, 0x400dc, 0x4057c}, + {OP_SW, 0x400dc, 0x4057e}, {OP_ZR, 0x400ec, 0x4}, {OP_RD, 0x40124, 0x0}, {OP_RD, 0x40128, 0x0}, @@ -391,67 +391,67 @@ static const struct raw_op init_ops_e1[] {OP_WR, 0x40134, 0xf}, /* #define PRS_COMMON_END 353 */ /* #define PXP2_COMMON_START 374 */ - {OP_SW, 0x120490, 0x220580}, + {OP_SW, 0x120490, 0x220582}, {OP_WR, 0x120520, 0x2}, {OP_WR, 0x120388, 0x64}, {OP_WR, 0x120390, 0x8}, - {OP_SW, 0x12039c, 0x305a2}, + {OP_SW, 0x12039c, 0x305a4}, {OP_WR, 0x1203bc, 0x4}, {OP_WR, 0x1203c4, 0x4}, {OP_WR, 0x1203d0, 0x0}, {OP_WR, 0x1203dc, 0x0}, {OP_WR, 0x12036c, 0x1}, {OP_WR, 0x120368, 0x3f}, - {OP_SW, 0x1201bc, 0x3c05a5}, - {OP_SW, 0x1202b0, 0x205e1}, - {OP_SW, 0x120324, 0x205e3}, + {OP_SW, 0x1201bc, 0x3c05a7}, + {OP_SW, 0x1202b0, 0x205e3}, + {OP_SW, 0x120324, 0x205e5}, {OP_WR, 0x1201b0, 0x1}, /* #define PXP2_COMMON_END 375 */ /* #define PXP_COMMON_START 396 */ - {OP_WB, 0x103800, 0x505e5}, - {OP_WB, 0x103c00, 0x505ea}, - {OP_WB, 0x103c20, 0x505ef}, + {OP_WB, 0x103800, 0x505e7}, + {OP_WB, 0x103c00, 0x505ec}, + {OP_WB, 0x103c20, 0x505f1}, /* #define PXP_COMMON_END 397 */ /* #define QM_COMMON_START 418 */ - {OP_SW, 0x168030, 0x805f4}, + {OP_SW, 0x168030, 0x805f6}, {OP_WR, 0x168054, 0x2}, - {OP_SW, 0x168060, 0x505fc}, + {OP_SW, 0x168060, 0x505fe}, {OP_ZR, 0x168074, 0x7}, - {OP_SW, 0x168090, 0x20601}, - {OP_SW, 0x16809c, 0x50603}, + {OP_SW, 0x168090, 0x20603}, + {OP_SW, 0x16809c, 0x50605}, {OP_ZR, 0x1680b0, 0x7}, - {OP_SW, 0x1680cc, 0x80608}, + {OP_SW, 0x1680cc, 0x8060a}, {OP_WR, 0x1680f0, 0x7}, {OP_ZR, 0x1680f4, 0xc}, - {OP_SW, 0x168124, 0x40610}, + {OP_SW, 0x168124, 0x40612}, {OP_ZR, 0x168134, 0xc}, - {OP_SW, 0x168164, 0x3b0614}, + {OP_SW, 0x168164, 0x3b0616}, {OP_ZR, 0x168250, 0x4}, - {OP_SW, 0x168260, 0x2064f}, + {OP_SW, 0x168260, 0x20651}, {OP_ZR, 0x168268, 0x8}, - {OP_SW, 0x168288, 0x80651}, + {OP_SW, 0x168288, 0x80653}, {OP_ZR, 0x1682a8, 0xa}, {OP_WR, 0x168804, 0x4}, - {OP_SW, 0x16880c, 0x100659}, + {OP_SW, 0x16880c, 0x10065b}, {OP_WR, 0x1680ec, 0xff}, /* #define QM_COMMON_END 419 */ /* #define SRC_COMMON_START 440 */ - {OP_SW, 0x40408, 0x140669}, + {OP_SW, 0x40408, 0x14066b}, /* #define SRC_COMMON_END 441 */ /* #define TCM_COMMON_START 462 */ - {OP_SW, 0x50044, 0x2067d}, - {OP_SW, 0x50050, 0x4067f}, + {OP_SW, 0x50044, 0x2067f}, + {OP_SW, 0x50050, 0x40681}, {OP_ZR, 0x50060, 0x4}, - {OP_SW, 0x50090, 0x130683}, + {OP_SW, 0x50090, 0x130685}, {OP_WR, 0x50114, 0x1}, - {OP_SW, 0x5011c, 0x20696}, + {OP_SW, 0x5011c, 0x20698}, {OP_WR, 0x50204, 0x1}, - {OP_SW, 0x5020c, 0x20698}, - {OP_SW, 0x5021c, 0x3069a}, + {OP_SW, 0x5020c, 0x2069a}, + {OP_SW, 0x5021c, 0x3069c}, {OP_ZR, 0x50240, 0xa}, - {OP_SW, 0x50280, 0x20069d}, + {OP_SW, 0x50280, 0x20069f}, {OP_ZR, 0x54000, 0xd00}, - {OP_SW, 0x50004, 0x1006bd}, + {OP_SW, 0x50004, 0x1006bf}, /* #define TCM_COMMON_END 463 */ /* #define TCM_PORT0_START 464 */ {OP_WR, 0x500e0, 0xe}, @@ -461,7 +461,7 @@ static const struct raw_op init_ops_e1[] /* #define TCM_PORT1_END 467 */ /* #define TM_COMMON_START 484 */ {OP_ZR, 0x164024, 0x2}, - {OP_SW, 0x164030, 0x306cd}, + {OP_SW, 0x164030, 0x306cf}, {OP_WR, 0x164044, 0x20}, {OP_WR, 0x164070, 0x1c}, {OP_WR, 0x164208, 0x1}, @@ -479,7 +479,7 @@ static const struct raw_op init_ops_e1[] {OP_WR, 0x16401c, 0x9c}, {OP_WR, 0x164000, 0x1}, {OP_WR, 0x1640d8, 0x1}, - {OP_SW, 0x164008, 0x306d0}, + {OP_SW, 0x164008, 0x306d2}, /* #define TM_COMMON_END 485 */ /* #define TM_PORT0_START 486 */ {OP_WR, 0x164240, 0x0}, @@ -492,10 +492,10 @@ static const struct raw_op init_ops_e1[] {OP_WB_ZR, 0x164280, 0x2}, /* #define TM_PORT1_END 489 */ /* #define TSDM_COMMON_START 506 */ - {OP_SW, 0x42008, 0x406d3}, - {OP_SW, 0x4201c, 0x406d7}, + {OP_SW, 0x42008, 0x406d5}, + {OP_SW, 0x4201c, 0x406d9}, {OP_ZR, 0x42038, 0x80}, - {OP_SW, 0x42238, 0x406db}, + {OP_SW, 0x42238, 0x406dd}, {OP_RD, 0x42248, 0x0}, {OP_RD, 0x4224c, 0x0}, {OP_RD, 0x42250, 0x0}, @@ -520,17 +520,17 @@ static const struct raw_op init_ops_e1[] /* #define TSDM_COMMON_END 507 */ /* #define TSEM_COMMON_START 528 */ {OP_FW, 0x180400, 0xd80000}, - {OP_WR_64, 0x180760, 0x1406df}, + {OP_WR_64, 0x180760, 0x1406e1}, {OP_ZR, 0x1a0000, 0x1600}, {OP_ZR, 0x1a8000, 0x40}, - {OP_SW, 0x1a08b0, 0x206e1}, - {OP_SW, 0x1a19c8, 0x206e3}, - {OP_SW, 0x1a2fc0, 0x406e5}, + {OP_SW, 0x1a08b0, 0x206e3}, + {OP_SW, 0x1a19c8, 0x206e5}, + {OP_SW, 0x1a2fc0, 0x406e7}, {OP_ZR, 0x1a2fd0, 0x6}, - {OP_SW, 0x1a2fe8, 0x206e9}, - {OP_SW, 0x1a3000, 0x3f906eb}, + {OP_SW, 0x1a2fe8, 0x206eb}, + {OP_SW, 0x1a3000, 0x3f906ed}, {OP_ZR, 0x1a3fe4, 0x7}, - {OP_SW, 0x1a4870, 0x40ae4}, + {OP_SW, 0x1a4870, 0x40ae6}, {OP_WR, 0x1b8000, 0x34}, {OP_WR, 0x1b8040, 0x18}, {OP_WR, 0x1b8080, 0xc}, @@ -547,16 +547,16 @@ static const struct raw_op init_ops_e1[] {OP_IF_MODE_AND, 2, 0x4}, /* emul */ {OP_WR, 0x1b8300, 0x138}, {OP_WR, 0x1b8340, 0x0}, - {OP_FW, 0x1c0000, 0x535c0000}, - {OP_WR_64, 0x1d4d70, 0x56520ae8}, + {OP_FW, 0x1c0000, 0x48600000}, + {OP_WR_64, 0x1d2180, 0x5bd00aea}, {OP_RD, 0x180000, 0x0}, {OP_RD, 0x180004, 0x0}, {OP_RD, 0x180008, 0x0}, {OP_RD, 0x18000c, 0x0}, {OP_RD, 0x180010, 0x0}, {OP_RD, 0x180014, 0x0}, - {OP_SW, 0x180020, 0x1a0aea}, - {OP_SW, 0x1800a4, 0x20b04}, + {OP_SW, 0x180020, 0x1a0aec}, + {OP_SW, 0x1800a4, 0x20b06}, {OP_WR, 0x180224, 0x0}, {OP_WR, 0x180234, 0x0}, {OP_WR, 0x18024c, 0x0}, @@ -570,11 +570,11 @@ static const struct raw_op init_ops_e1[] {OP_ZR, 0x1a2500, 0x10}, {OP_ZR, 0x1a2580, 0x12}, {OP_ZR, 0x1a2610, 0x12}, - {OP_SW, 0x1a2fb0, 0x20b06}, + {OP_SW, 0x1a2fb0, 0x20b08}, {OP_ZR, 0x1a4000, 0x6}, {OP_ZR, 0x1a4030, 0x2}, {OP_ZR, 0x1a4820, 0x2}, - {OP_SW, 0x1a4c50, 0x20b08}, + {OP_SW, 0x1a4c50, 0x20b0a}, /* #define TSEM_PORT0_END 531 */ /* #define TSEM_PORT1_START 532 */ {OP_ZR, 0x1a0810, 0x2}, @@ -583,26 +583,26 @@ static const struct raw_op init_ops_e1[] {OP_ZR, 0x1a2540, 0x10}, {OP_ZR, 0x1a25c8, 0x12}, {OP_ZR, 0x1a2658, 0x12}, - {OP_SW, 0x1a2fb8, 0x20b0a}, + {OP_SW, 0x1a2fb8, 0x20b0c}, {OP_ZR, 0x1a4018, 0x6}, {OP_ZR, 0x1a4038, 0x2}, {OP_ZR, 0x1a4828, 0x2}, - {OP_SW, 0x1a4c58, 0x20b0c}, + {OP_SW, 0x1a4c58, 0x20b0e}, /* #define TSEM_PORT1_END 533 */ /* #define UCM_COMMON_START 550 */ {OP_WR, 0xe004c, 0x32}, - {OP_SW, 0xe0054, 0x40b0e}, + {OP_SW, 0xe0054, 0x40b10}, {OP_ZR, 0xe0064, 0x4}, - {OP_SW, 0xe0094, 0x130b12}, + {OP_SW, 0xe0094, 0x130b14}, {OP_WR, 0xe0144, 0x1}, - {OP_SW, 0xe014c, 0x20b25}, + {OP_SW, 0xe014c, 0x20b27}, {OP_WR, 0xe0204, 0x1}, - {OP_SW, 0xe020c, 0x20b27}, - {OP_SW, 0xe021c, 0x40b29}, - {OP_SW, 0xe0280, 0x1b0b2d}, + {OP_SW, 0xe020c, 0x20b29}, + {OP_SW, 0xe021c, 0x40b2b}, + {OP_SW, 0xe0280, 0x1b0b2f}, {OP_ZR, 0xe02ec, 0x17}, {OP_ZR, 0xe2000, 0x800}, - {OP_SW, 0xe0004, 0x110b48}, + {OP_SW, 0xe0004, 0x110b4a}, /* #define UCM_COMMON_END 551 */ /* #define UCM_PORT0_START 552 */ {OP_WR, 0xe0110, 0xf}, @@ -614,13 +614,13 @@ static const struct raw_op init_ops_e1[] {OP_WR, 0xc1000, 0x28}, /* #define UPB_COMMON_END 573 */ /* #define USDM_COMMON_START 594 */ - {OP_SW, 0xc4008, 0x40b59}, - {OP_SW, 0xc401c, 0x40b5d}, - {OP_SW, 0xc4038, 0x20b61}, + {OP_SW, 0xc4008, 0x40b5b}, + {OP_SW, 0xc401c, 0x40b5f}, + {OP_SW, 0xc4038, 0x20b63}, {OP_ZR, 0xc4040, 0x5e}, {OP_WR, 0xc41b8, 0x1}, {OP_ZR, 0xc41bc, 0x1f}, - {OP_SW, 0xc4238, 0x40b63}, + {OP_SW, 0xc4238, 0x40b65}, {OP_RD, 0xc4248, 0x0}, {OP_RD, 0xc424c, 0x0}, {OP_RD, 0xc4250, 0x0}, @@ -646,13 +646,13 @@ static const struct raw_op init_ops_e1[] /* #define USDM_COMMON_END 595 */ /* #define USEM_COMMON_START 616 */ {OP_FW, 0x300400, 0xda0000}, - {OP_WR_64, 0x300768, 0x130b67}, + {OP_WR_64, 0x300768, 0x130b69}, {OP_ZR, 0x320000, 0x1600}, {OP_ZR, 0x328000, 0x40}, - {OP_SW, 0x321830, 0x20b69}, - {OP_SW, 0x322e70, 0x40b6b}, + {OP_SW, 0x321830, 0x20b6b}, + {OP_SW, 0x322e70, 0x40b6d}, {OP_ZR, 0x325080, 0x8}, - {OP_SW, 0x3250a0, 0x20b6f}, + {OP_SW, 0x3250a0, 0x20b71}, {OP_WR, 0x338000, 0x1a}, {OP_WR, 0x338040, 0x4e}, {OP_WR, 0x338080, 0x10}, @@ -669,16 +669,16 @@ static const struct raw_op init_ops_e1[] {OP_IF_MODE_AND, 2, 0x4}, /* emul */ {OP_WR, 0x338300, 0x138}, {OP_WR, 0x338340, 0x0}, - {OP_FW, 0x340000, 0x59440000}, - {OP_WR_64, 0x356510, 0x535e0b71}, + {OP_FW, 0x340000, 0x88540000}, + {OP_WR_64, 0x362150, 0x3bd60b73}, {OP_RD, 0x300000, 0x0}, {OP_RD, 0x300004, 0x0}, {OP_RD, 0x300008, 0x0}, {OP_RD, 0x30000c, 0x0}, {OP_RD, 0x300010, 0x0}, {OP_RD, 0x300014, 0x0}, - {OP_SW, 0x300020, 0x1a0b73}, - {OP_SW, 0x3000a4, 0x20b8d}, + {OP_SW, 0x300020, 0x1a0b75}, + {OP_SW, 0x3000a4, 0x20b8f}, {OP_WR, 0x300224, 0x0}, {OP_WR, 0x300234, 0x0}, {OP_WR, 0x30024c, 0x0}, @@ -733,23 +733,23 @@ static const struct raw_op init_ops_e1[] /* #define USEM_PORT1_END 621 */ /* #define XCM_COMMON_START 638 */ {OP_WR, 0x20058, 0x32}, - {OP_SW, 0x20060, 0x40b8f}, + {OP_SW, 0x20060, 0x40b91}, {OP_ZR, 0x20070, 0x4}, - {OP_SW, 0x200a0, 0xe0b93}, - {OP_SW, 0x200dc, 0x70ba1}, + {OP_SW, 0x200a0, 0xe0b95}, + {OP_SW, 0x200dc, 0x70ba3}, {OP_WR, 0x200fc, 0x6}, {OP_WR, 0x20120, 0x0}, {OP_WR, 0x20134, 0x2}, {OP_WR, 0x201b0, 0x1}, {OP_WR, 0x2020c, 0x1}, - {OP_SW, 0x20214, 0x20ba8}, + {OP_SW, 0x20214, 0x20baa}, {OP_WR, 0x20404, 0x1}, - {OP_SW, 0x2040c, 0x20baa}, - {OP_SW, 0x2041c, 0x40bac}, - {OP_SW, 0x20480, 0x1f0bb0}, + {OP_SW, 0x2040c, 0x20bac}, + {OP_SW, 0x2041c, 0x40bae}, + {OP_SW, 0x20480, 0x1f0bb2}, {OP_ZR, 0x204fc, 0x13}, {OP_ZR, 0x28000, 0x2000}, - {OP_SW, 0x20004, 0x140bcf}, + {OP_SW, 0x20004, 0x140bd1}, /* #define XCM_COMMON_END 639 */ /* #define XCM_PORT0_START 640 */ {OP_WR, 0x20108, 0xc8}, @@ -775,15 +775,15 @@ static const struct raw_op init_ops_e1[] {OP_WR, 0x161000, 0x28}, /* #define XPB_COMMON_END 661 */ /* #define XSDM_COMMON_START 682 */ - {OP_SW, 0x166008, 0x30be3}, - {OP_SW, 0x16601c, 0x40be6}, - {OP_SW, 0x166038, 0xd0bea}, + {OP_SW, 0x166008, 0x30be5}, + {OP_SW, 0x16601c, 0x40be8}, + {OP_SW, 0x166038, 0xd0bec}, {OP_ZR, 0x16606c, 0x13}, - {OP_SW, 0x1660b8, 0x20bf7}, + {OP_SW, 0x1660b8, 0x20bf9}, {OP_ZR, 0x1660c0, 0x3e}, {OP_WR, 0x1661b8, 0x1}, {OP_ZR, 0x1661bc, 0x1f}, - {OP_SW, 0x166238, 0x40bf9}, + {OP_SW, 0x166238, 0x40bfb}, {OP_RD, 0x166248, 0x0}, {OP_RD, 0x16624c, 0x0}, {OP_RD, 0x166250, 0x0}, @@ -808,19 +808,19 @@ static const struct raw_op init_ops_e1[] /* #define XSDM_COMMON_END 683 */ /* #define XSEM_COMMON_START 704 */ {OP_FW, 0x280400, 0xda0000}, - {OP_WR_64, 0x280768, 0x130bfd}, + {OP_WR_64, 0x280768, 0x130bff}, {OP_ZR, 0x2a0000, 0x1600}, {OP_ZR, 0x2a8000, 0x40}, - {OP_SW, 0x2a2500, 0x20bff}, - {OP_SW, 0x2a2960, 0x40c01}, - {OP_SW, 0x2a2f48, 0x20c05}, - {OP_SW, 0x2a3368, 0x20c07}, - {OP_SW, 0x2a3920, 0x20c09}, - {OP_SW, 0x2a3930, 0x20c0b}, - {OP_SW, 0x2a3ac8, 0x20c0d}, + {OP_SW, 0x2a2500, 0x20c01}, + {OP_SW, 0x2a2960, 0x40c03}, + {OP_SW, 0x2a2f48, 0x20c07}, + {OP_SW, 0x2a3368, 0x20c09}, + {OP_SW, 0x2a3920, 0x20c0b}, + {OP_SW, 0x2a3930, 0x20c0d}, + {OP_SW, 0x2a3ac8, 0x20c0f}, {OP_ZR, 0x2a3ad0, 0x6}, - {OP_SW, 0x2a3b98, 0x20c0f}, - {OP_SW, 0x2a3c20, 0x40c11}, + {OP_SW, 0x2a3b98, 0x20c11}, + {OP_SW, 0x2a3c20, 0x40c13}, {OP_WR, 0x2a3cd0, 0x0}, {OP_WR, 0x2b8000, 0x0}, {OP_WR, 0x2b8040, 0x18}, @@ -840,16 +840,16 @@ static const struct raw_op init_ops_e1[] {OP_WR, 0x2b8340, 0x0}, {OP_IF_MODE_AND, 1, 0x20}, /* port2 */ {OP_WR, 0x2a3cd4, 0x0}, - {OP_FW, 0x2c0000, 0x6c0c0000}, - {OP_WR_64, 0x2db030, 0x49fa0c15}, + {OP_FW, 0x2c0000, 0x64e40000}, + {OP_WR_64, 0x2d9390, 0x4d8e0c17}, {OP_RD, 0x280000, 0x0}, {OP_RD, 0x280004, 0x0}, {OP_RD, 0x280008, 0x0}, {OP_RD, 0x28000c, 0x0}, {OP_RD, 0x280010, 0x0}, {OP_RD, 0x280014, 0x0}, - {OP_SW, 0x280020, 0x1a0c17}, - {OP_SW, 0x2800a4, 0x20c31}, + {OP_SW, 0x280020, 0x1a0c19}, + {OP_SW, 0x2800a4, 0x20c33}, {OP_WR, 0x280224, 0x0}, {OP_WR, 0x280234, 0x0}, {OP_WR, 0x28024c, 0x0}, @@ -860,8 +860,8 @@ static const struct raw_op init_ops_e1[] {OP_ZR, 0x2a3910, 0x2}, {OP_ZR, 0x2a3938, 0x20}, {OP_ZR, 0x2a3a38, 0x10}, - {OP_SW, 0x2a3ae8, 0x20c33}, - {OP_SW, 0x2a3af8, 0x100c35}, + {OP_SW, 0x2a3ae8, 0x20c35}, + {OP_SW, 0x2a3af8, 0x100c37}, {OP_ZR, 0x2a3c30, 0x2}, {OP_ZR, 0x2a5000, 0x2}, {OP_ZR, 0x2a5010, 0x2}, @@ -874,8 +874,8 @@ static const struct raw_op init_ops_e1[] {OP_ZR, 0x2a3918, 0x2}, {OP_ZR, 0x2a39b8, 0x20}, {OP_ZR, 0x2a3a78, 0x10}, - {OP_SW, 0x2a3af0, 0x20c45}, - {OP_SW, 0x2a3b38, 0x100c47}, + {OP_SW, 0x2a3af0, 0x20c47}, + {OP_SW, 0x2a3b38, 0x100c49}, {OP_ZR, 0x2a3c38, 0x2}, {OP_ZR, 0x2a5008, 0x2}, {OP_ZR, 0x2a5018, 0x2}, @@ -888,20 +888,20 @@ static const struct raw_op init_ops_e1[] {OP_ZR, 0xa000, 0x16}, /* #define MISC_AEU_COMMON_END 727 */ /* #define MISC_AEU_PORT0_START 728 */ - {OP_SW, 0xa06c, 0x60c57}, + {OP_SW, 0xa06c, 0x60c59}, {OP_ZR, 0xa084, 0x5}, {OP_WR, 0xa098, 0xfe00000}, {OP_ZR, 0xa09c, 0x14}, - {OP_SW, 0xa0ec, 0x80c5d}, + {OP_SW, 0xa0ec, 0x80c5f}, {OP_ZR, 0xa22c, 0x4}, {OP_WR, 0xa060, 0x307}, /* #define MISC_AEU_PORT0_END 729 */ /* #define MISC_AEU_PORT1_START 730 */ - {OP_SW, 0xa10c, 0x60c65}, + {OP_SW, 0xa10c, 0x60c67}, {OP_ZR, 0xa124, 0x5}, {OP_WR, 0xa138, 0xfe00000}, {OP_ZR, 0xa13c, 0x14}, - {OP_SW, 0xa18c, 0x80c6b}, + {OP_SW, 0xa18c, 0x80c6d}, {OP_ZR, 0xa23c, 0x4}, {OP_WR, 0xa064, 0x307}, /* #define MISC_AEU_PORT1_END 731 */ @@ -1183,14 +1183,15 @@ static const uint32_t init_data_e1[] = { 0x00000000, 0x00100000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00200000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00400000, - 0x00000000, 0x00000a11, 0x00000a00, 0x00000a04, 0x0000ffff, 0x0000ffff, - 0x0000ffff, 0x0000ffff, 0x00000020, 0x00000021, 0x00000022, 0x00000023, - 0x00000024, 0x00000025, 0x00000026, 0x00000027, 0x00000028, 0x00000029, - 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 0x0000002e, 0x0000002f, - 0x00000010, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000000, 0x00000200, 0x00003dff, 0x00000a11, 0x00000a00, 0x00000a04, + 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x00000020, 0x00000021, + 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000026, 0x00000027, + 0x00000028, 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, + 0x0000002e, 0x0000002f, 0x00000010, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, - 0x07ffffff, 0x0000003f, 0x07ffffff, 0x0000000f, 0x00007ff8, 0x00007ff8, + 0x00000001, 0x00000001, 0x07ffffff, 0x0000003f, 0x07ffffff, 0x0000000f, + 0x00007ff8, 0x00007ff8, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, @@ -1211,347 +1212,346 @@ static const uint32_t init_data_e1[] = { 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, - 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, - 0x0000ff1c, 0x0fffffff, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, - 0x00000312, 0x00003500, 0x00000001, 0x00000002, 0x00000003, 0x00000000, - 0x00000004, 0x00000001, 0x00000000, 0x00000001, 0x00000004, 0x00000000, - 0x00000001, 0x00000003, 0x00000000, 0x00000001, 0x00000004, 0x00000000, - 0x00000001, 0x00000003, 0x00000000, 0x00000001, 0x00000004, 0x00000000, - 0x00000004, 0x00000003, 0x00000000, 0x00000000, 0x00003fff, 0x000003ff, - 0x00000000, 0x00000001, 0x00000001, 0x00000001, 0x007c1004, 0x00000004, - 0x00000000, 0x00000002, 0x00000090, 0x00000090, 0x00800090, 0x08100000, - 0x0000008a, 0x00000080, 0x00000081, 0x00000080, 0x00000006, 0x000007d0, - 0x0000076c, 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x071d2911, - 0x00000000, 0x009c0424, 0x00000000, 0x00000001, 0x00000001, 0x00000001, - 0x00000001, 0x00000001, 0x00007fff, 0x000000ff, 0x000000ff, 0x000000ff, - 0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff, 0x0000003e, - 0x00000000, 0x0000003f, 0x0000003f, 0x0000003f, 0x00000000, 0x0000003f, - 0x0000003f, 0x0000003f, 0x0000000f, 0x00000043, 0x00000000, 0x00000006, - 0x00000000, 0x12170000, 0x22170000, 0x32170000, 0x12150000, 0x22150000, - 0x32150000, 0x02100000, 0x00100000, 0x10100000, 0x20100000, 0x30100000, - 0x00100000, 0x12140000, 0x22140000, 0x32140000, 0x00e38340, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xf0003000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffff3328, 0xffff3338, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x00000002, 0x00001500, 0x00000001, 0x00000002, + 0x00000003, 0x00000000, 0x00000004, 0x00000001, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000004, 0x00000003, 0x00000000, 0x00000000, + 0x00003fff, 0x000003ff, 0x00000000, 0x00000001, 0x00000001, 0x00000001, + 0x007c1004, 0x00000004, 0x00000000, 0x00000002, 0x00000090, 0x00000090, + 0x00800090, 0x08100000, 0x0000008a, 0x00000080, 0x00000081, 0x00000080, + 0x00000006, 0x000007d0, 0x0000076c, 0x0000ffff, 0x0000ffff, 0x0000ffff, + 0x0000ffff, 0x071d2911, 0x00000000, 0x009c0424, 0x00000000, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00007fff, 0x000000ff, + 0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff, + 0x000000ff, 0x0000003e, 0x00000000, 0x0000003f, 0x0000003f, 0x0000003f, + 0x00000000, 0x0000003f, 0x0000003f, 0x0000003f, 0x0000000f, 0x00000043, + 0x00000000, 0x00000006, 0x00000000, 0x12170000, 0x22170000, 0x32170000, + 0x12150000, 0x22150000, 0x32150000, 0x02100000, 0x00100000, 0x10100000, + 0x20100000, 0x30100000, 0x00100000, 0x12140000, 0x22140000, 0x32140000, + 0x00e38340, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xf0003000, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffff3328, + 0xffff3338, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 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