From owner-svn-src-stable@freebsd.org Sat Nov 30 20:42:19 2019 Return-Path: Delivered-To: svn-src-stable@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 5412C1B788B; Sat, 30 Nov 2019 20:42:19 +0000 (UTC) (envelope-from np@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 47QNbb1XKGz4TwY; Sat, 30 Nov 2019 20:42:19 +0000 (UTC) (envelope-from np@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 192074092; Sat, 30 Nov 2019 20:42:19 +0000 (UTC) (envelope-from np@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id xAUKgImK072133; Sat, 30 Nov 2019 20:42:18 GMT (envelope-from np@FreeBSD.org) Received: (from np@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id xAUKgIqI072130; Sat, 30 Nov 2019 20:42:18 GMT (envelope-from np@FreeBSD.org) Message-Id: <201911302042.xAUKgIqI072130@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: np set sender to np@FreeBSD.org using -f From: Navdeep Parhar Date: Sat, 30 Nov 2019 20:42:18 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r355250 - in stable/11/sys/dev/cxgbe: . common iw_cxgbe X-SVN-Group: stable-11 X-SVN-Commit-Author: np X-SVN-Commit-Paths: in stable/11/sys/dev/cxgbe: . common iw_cxgbe X-SVN-Commit-Revision: 355250 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 30 Nov 2019 20:42:19 -0000 Author: np Date: Sat Nov 30 20:42:18 2019 New Revision: 355250 URL: https://svnweb.freebsd.org/changeset/base/355250 Log: MFC r354106: cxgbe(4): Use correct FetchBurstMin values for T6. Sponsored by: Chelsio Communications Modified: stable/11/sys/dev/cxgbe/common/t4_regs_values.h stable/11/sys/dev/cxgbe/iw_cxgbe/qp.c stable/11/sys/dev/cxgbe/t4_netmap.c stable/11/sys/dev/cxgbe/t4_sge.c Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/dev/cxgbe/common/t4_regs_values.h ============================================================================== --- stable/11/sys/dev/cxgbe/common/t4_regs_values.h Sat Nov 30 20:22:03 2019 (r355249) +++ stable/11/sys/dev/cxgbe/common/t4_regs_values.h Sat Nov 30 20:42:18 2019 (r355250) @@ -145,6 +145,11 @@ #define X_FETCHBURSTMIN_64B 2 #define X_FETCHBURSTMIN_128B 3 +/* T6 and later use a single-bit encoding for FetchBurstMin */ +#define X_FETCHBURSTMIN_SHIFT_T6 6 +#define X_FETCHBURSTMIN_64B_T6 0 +#define X_FETCHBURSTMIN_128B_T6 1 + #define X_FETCHBURSTMAX_SHIFT 6 #define X_FETCHBURSTMAX_64B 0 #define X_FETCHBURSTMAX_128B 1 Modified: stable/11/sys/dev/cxgbe/iw_cxgbe/qp.c ============================================================================== --- stable/11/sys/dev/cxgbe/iw_cxgbe/qp.c Sat Nov 30 20:22:03 2019 (r355249) +++ stable/11/sys/dev/cxgbe/iw_cxgbe/qp.c Sat Nov 30 20:42:18 2019 (r355250) @@ -264,7 +264,8 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4 res->u.sqrq.dcaen_to_eqsize = cpu_to_be32( V_FW_RI_RES_WR_DCAEN(0) | V_FW_RI_RES_WR_DCACPU(0) | - V_FW_RI_RES_WR_FBMIN(2) | + V_FW_RI_RES_WR_FBMIN(chip_id(sc) <= CHELSIO_T5 ? + X_FETCHBURSTMIN_64B : X_FETCHBURSTMIN_64B_T6) | V_FW_RI_RES_WR_FBMAX(3) | V_FW_RI_RES_WR_CIDXFTHRESHO(0) | V_FW_RI_RES_WR_CIDXFTHRESH(0) | @@ -286,7 +287,8 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4 res->u.sqrq.dcaen_to_eqsize = cpu_to_be32( V_FW_RI_RES_WR_DCAEN(0) | V_FW_RI_RES_WR_DCACPU(0) | - V_FW_RI_RES_WR_FBMIN(2) | + V_FW_RI_RES_WR_FBMIN(chip_id(sc) <= CHELSIO_T5 ? + X_FETCHBURSTMIN_64B : X_FETCHBURSTMIN_64B_T6) | V_FW_RI_RES_WR_FBMAX(3) | V_FW_RI_RES_WR_CIDXFTHRESHO(0) | V_FW_RI_RES_WR_CIDXFTHRESH(0) | Modified: stable/11/sys/dev/cxgbe/t4_netmap.c ============================================================================== --- stable/11/sys/dev/cxgbe/t4_netmap.c Sat Nov 30 20:22:03 2019 (r355249) +++ stable/11/sys/dev/cxgbe/t4_netmap.c Sat Nov 30 20:42:18 2019 (r355250) @@ -134,7 +134,7 @@ alloc_nm_rxq_hwq(struct vi_info *vi, struct sge_nm_rxq (black_hole == 2 ? F_FW_IQ_CMD_FL0PACKEN : 0)); c.fl0dcaen_to_fl0cidxfthresh = htobe16(V_FW_IQ_CMD_FL0FBMIN(chip_id(sc) <= CHELSIO_T5 ? - X_FETCHBURSTMIN_128B : X_FETCHBURSTMIN_64B) | + X_FETCHBURSTMIN_128B : X_FETCHBURSTMIN_64B_T6) | V_FW_IQ_CMD_FL0FBMAX(chip_id(sc) <= CHELSIO_T5 ? X_FETCHBURSTMAX_512B : X_FETCHBURSTMAX_256B)); c.fl0size = htobe16(na->num_rx_desc / 8 + sp->spg_len / EQ_ESIZE); @@ -248,9 +248,11 @@ alloc_nm_txq_hwq(struct vi_info *vi, struct sge_nm_txq htobe32(V_FW_EQ_ETH_CMD_HOSTFCMODE(X_HOSTFCMODE_NONE) | V_FW_EQ_ETH_CMD_PCIECHN(vi->pi->tx_chan) | F_FW_EQ_ETH_CMD_FETCHRO | V_FW_EQ_ETH_CMD_IQID(sc->sge.nm_rxq[nm_txq->iqidx].iq_cntxt_id)); - c.dcaen_to_eqsize = htobe32(V_FW_EQ_ETH_CMD_FBMIN(X_FETCHBURSTMIN_64B) | - V_FW_EQ_ETH_CMD_FBMAX(X_FETCHBURSTMAX_512B) | - V_FW_EQ_ETH_CMD_EQSIZE(len / EQ_ESIZE)); + c.dcaen_to_eqsize = + htobe32(V_FW_EQ_ETH_CMD_FBMIN(chip_id(sc) <= CHELSIO_T5 ? + X_FETCHBURSTMIN_64B : X_FETCHBURSTMIN_64B_T6) | + V_FW_EQ_ETH_CMD_FBMAX(X_FETCHBURSTMAX_512B) | + V_FW_EQ_ETH_CMD_EQSIZE(len / EQ_ESIZE)); c.eqaddr = htobe64(nm_txq->ba); rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c); Modified: stable/11/sys/dev/cxgbe/t4_sge.c ============================================================================== --- stable/11/sys/dev/cxgbe/t4_sge.c Sat Nov 30 20:22:03 2019 (r355249) +++ stable/11/sys/dev/cxgbe/t4_sge.c Sat Nov 30 20:42:18 2019 (r355250) @@ -2886,7 +2886,7 @@ alloc_iq_fl(struct vi_info *vi, struct sge_iq *iq, str } c.fl0dcaen_to_fl0cidxfthresh = htobe16(V_FW_IQ_CMD_FL0FBMIN(chip_id(sc) <= CHELSIO_T5 ? - X_FETCHBURSTMIN_128B : X_FETCHBURSTMIN_64B) | + X_FETCHBURSTMIN_128B : X_FETCHBURSTMIN_64B_T6) | V_FW_IQ_CMD_FL0FBMAX(chip_id(sc) <= CHELSIO_T5 ? X_FETCHBURSTMAX_512B : X_FETCHBURSTMAX_256B)); c.fl0size = htobe16(fl->qsize); @@ -3458,7 +3458,8 @@ ctrl_eq_alloc(struct adapter *sc, struct sge_eq *eq) V_FW_EQ_CTRL_CMD_PCIECHN(eq->tx_chan) | F_FW_EQ_CTRL_CMD_FETCHRO | V_FW_EQ_CTRL_CMD_IQID(eq->iqid)); c.dcaen_to_eqsize = - htobe32(V_FW_EQ_CTRL_CMD_FBMIN(X_FETCHBURSTMIN_64B) | + htobe32(V_FW_EQ_CTRL_CMD_FBMIN(chip_id(sc) <= CHELSIO_T5 ? + X_FETCHBURSTMIN_64B : X_FETCHBURSTMIN_64B_T6) | V_FW_EQ_CTRL_CMD_FBMAX(X_FETCHBURSTMAX_512B) | V_FW_EQ_CTRL_CMD_CIDXFTHRESH(qsize_to_fthresh(qsize)) | V_FW_EQ_CTRL_CMD_EQSIZE(qsize)); @@ -3502,9 +3503,11 @@ eth_eq_alloc(struct adapter *sc, struct vi_info *vi, s htobe32(V_FW_EQ_ETH_CMD_HOSTFCMODE(X_HOSTFCMODE_NONE) | V_FW_EQ_ETH_CMD_PCIECHN(eq->tx_chan) | F_FW_EQ_ETH_CMD_FETCHRO | V_FW_EQ_ETH_CMD_IQID(eq->iqid)); - c.dcaen_to_eqsize = htobe32(V_FW_EQ_ETH_CMD_FBMIN(X_FETCHBURSTMIN_64B) | - V_FW_EQ_ETH_CMD_FBMAX(X_FETCHBURSTMAX_512B) | - V_FW_EQ_ETH_CMD_EQSIZE(qsize)); + c.dcaen_to_eqsize = + htobe32(V_FW_EQ_ETH_CMD_FBMIN(chip_id(sc) <= CHELSIO_T5 ? + X_FETCHBURSTMIN_64B : X_FETCHBURSTMIN_64B_T6) | + V_FW_EQ_ETH_CMD_FBMAX(X_FETCHBURSTMAX_512B) | + V_FW_EQ_ETH_CMD_EQSIZE(qsize)); c.eqaddr = htobe64(eq->ba); rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c); @@ -3546,7 +3549,8 @@ ofld_eq_alloc(struct adapter *sc, struct vi_info *vi, V_FW_EQ_OFLD_CMD_PCIECHN(eq->tx_chan) | F_FW_EQ_OFLD_CMD_FETCHRO | V_FW_EQ_OFLD_CMD_IQID(eq->iqid)); c.dcaen_to_eqsize = - htobe32(V_FW_EQ_OFLD_CMD_FBMIN(X_FETCHBURSTMIN_64B) | + htobe32(V_FW_EQ_OFLD_CMD_FBMIN(chip_id(sc) <= CHELSIO_T5 ? + X_FETCHBURSTMIN_64B : X_FETCHBURSTMIN_64B_T6) | V_FW_EQ_OFLD_CMD_FBMAX(X_FETCHBURSTMAX_512B) | V_FW_EQ_OFLD_CMD_CIDXFTHRESH(qsize_to_fthresh(qsize)) | V_FW_EQ_OFLD_CMD_EQSIZE(qsize));