From owner-svn-src-all@FreeBSD.ORG Wed Dec 17 03:24:56 2008 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 444BC1065673; Wed, 17 Dec 2008 03:24:56 +0000 (UTC) (envelope-from murray@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 319CF8FC1B; Wed, 17 Dec 2008 03:24:56 +0000 (UTC) (envelope-from murray@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id mBH3Ou35055998; Wed, 17 Dec 2008 03:24:56 GMT (envelope-from murray@svn.freebsd.org) Received: (from murray@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id mBH3Ouef055997; Wed, 17 Dec 2008 03:24:56 GMT (envelope-from murray@svn.freebsd.org) Message-Id: <200812170324.mBH3Ouef055997@svn.freebsd.org> From: Murray Stokely Date: Wed, 17 Dec 2008 03:24:56 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r186204 - head/release/doc/en_US.ISO8859-1/hardware X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Dec 2008 03:24:56 -0000 Author: murray Date: Wed Dec 17 03:24:55 2008 New Revision: 186204 URL: http://svn.freebsd.org/changeset/base/186204 Log: 1. Update the list of Intel chips which have EM64T and can run the amd64 port. 2. Increase the known working maximum memory configuration from 8gb to 32gb. PR: docs/102148 (1) Submitted by: Mike Meyer (1 - partially) Reviewed by: hrs Approved by: re (hrs) MFC after: 1 minute Modified: head/release/doc/en_US.ISO8859-1/hardware/article.sgml Modified: head/release/doc/en_US.ISO8859-1/hardware/article.sgml ============================================================================== --- head/release/doc/en_US.ISO8859-1/hardware/article.sgml Wed Dec 17 02:54:18 2008 (r186203) +++ head/release/doc/en_US.ISO8859-1/hardware/article.sgml Wed Dec 17 03:24:55 2008 (r186204) @@ -90,22 +90,40 @@ - &intel; 64-bit &xeon; (Nocona). This - processor is fabricated on 90nm process technology, and - operates with 2.80 to 3.60 GHz (FSB 800MHz) and &intel; - E7520/E7525/E7320 chipsets. + All multi-core &intel; &xeon; processors except + Sossaman have EM64T support. - &intel; &pentium; 4 Processor supporting &intel; EM64T - (Prescott). This is fabricated on 90nm - process technology, uses FC-LGA775 package, and operates - with 3.20F/3.40F/3.60F GHz and &intel; 925X Express - chipsets. The corresponding S-Spec numbers are SL7L9, - SL7L8, SL7LA, SL7NZ, SL7PZ, and SL7PX. Note that - processors marked as 5xx numbers do not support - EM64T. + The single-core &intel; &xeon; + processors Nocona, Irwindale, + Potomac, and Cranford have + EM64T support. + + + All &intel; Core 2 (not Core Duo) and later + processors + + + + All &intel; &pentium; D processors + + + + &intel; &pentium; 4s and Celeron Ds using + the Cedar Mill core have EM64T + support. + + + + Some &intel; &pentium; 4s and Celeron Ds using + the Prescott core have EM64T support. See + the Intel + Processor Spec Finder for the definitive answer about + EM64T support in Intel processors. + + &intel; EM64T is an extended version of IA-32 (x86) and @@ -114,7 +132,7 @@ to &intel; EM64T as 64-bit extension technology or IA-32e. - The largest tested memory configuration to date is 8GB. + The largest tested memory configuration to date is 32GB. SMP support has been recently completed and is reasonably robust.