From owner-svn-src-head@FreeBSD.ORG Tue Apr 7 17:06:06 2009 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E7D19106566B; Tue, 7 Apr 2009 17:06:06 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id D558A8FC12; Tue, 7 Apr 2009 17:06:06 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n37H66P2015435; Tue, 7 Apr 2009 17:06:06 GMT (envelope-from imp@svn.freebsd.org) Received: (from imp@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n37H66J4015434; Tue, 7 Apr 2009 17:06:06 GMT (envelope-from imp@svn.freebsd.org) Message-Id: <200904071706.n37H66J4015434@svn.freebsd.org> From: Warner Losh Date: Tue, 7 Apr 2009 17:06:06 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r190811 - head/sys/dev/ed X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Apr 2009 17:06:07 -0000 Author: imp Date: Tue Apr 7 17:06:06 2009 New Revision: 190811 URL: http://svn.freebsd.org/changeset/base/190811 Log: More chip types, and fix a comment. Modified: head/sys/dev/ed/if_edreg.h Modified: head/sys/dev/ed/if_edreg.h ============================================================================== --- head/sys/dev/ed/if_edreg.h Tue Apr 7 16:40:31 2009 (r190810) +++ head/sys/dev/ed/if_edreg.h Tue Apr 7 17:06:06 2009 (r190811) @@ -1066,20 +1066,23 @@ struct ed_ring { /* * Chip types. */ - -#define ED_CHIP_TYPE_DP8390 0 -#define ED_CHIP_TYPE_WD790 1 -#define ED_CHIP_TYPE_AX88190 2 -#define ED_CHIP_TYPE_DL10019 3 -#define ED_CHIP_TYPE_DL10022 4 -#define ED_CHIP_TYPE_TC5299J 5 -#define ED_CHIP_TYPE_RTL8019 6 -#define ED_CHIP_TYPE_RTL8029 7 -#define ED_CHIP_TYPE_AX88790 8 +#define ED_CHIP_TYPE_AX88190 0 +#define ED_CHIP_TYPE_AX88790 1 +#define ED_CHIP_TYPE_DL10019 2 +#define ED_CHIP_TYPE_DL10022 3 +#define ED_CHIP_TYPE_DP8390 4 +#define ED_CHIP_TYPE_NS83903 5 +#define ED_CHIP_TYPE_NS83926 6 +#define ED_CHIP_TYPE_RTL8019 7 +#define ED_CHIP_TYPE_RTL8029 8 +#define ED_CHIP_TYPE_TC3299 9 +#define ED_CHIP_TYPE_TC5299J 10 +#define ED_CHIP_TYPE_W89C926 11 +#define ED_CHIP_TYPE_WD790 12 /* * MII bus definitions. These are common to both DL100xx and AX88x90 - * MII definitions, most likely because they are standards based. + * MII definitions, because they are standards based. */ #define ED_MII_STARTDELIM 0x01 #define ED_MII_WRITEOP 0x01