From owner-svn-src-head@FreeBSD.ORG Wed Apr 2 18:32:27 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id C6DCF9E4; Wed, 2 Apr 2014 18:32:27 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id B3A1F8EE; Wed, 2 Apr 2014 18:32:27 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s32IWR17013397; Wed, 2 Apr 2014 18:32:27 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s32IWRX5013396; Wed, 2 Apr 2014 18:32:27 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201404021832.s32IWRX5013396@svn.freebsd.org> From: Ian Lepore Date: Wed, 2 Apr 2014 18:32:27 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r264049 - head/sys/arm/arm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 Apr 2014 18:32:27 -0000 Author: ian Date: Wed Apr 2 18:32:27 2014 New Revision: 264049 URL: http://svnweb.freebsd.org/changeset/base/264049 Log: Disable the timer and clear any pending bit, then setup the new counter register values, then restart the timer. This prevents a situation where an old event fires just as we're about to load a new value into the timer, when the start routine is called to change the time of the current event. Also re-nest the parens properly for casting the result of converting time and frequency to a count. This doesn't actually change the result of the calcs, but will some day prevent a loss-of-precision warning on the assignment, if that warning gets enabled. Modified: head/sys/arm/arm/mpcore_timer.c Modified: head/sys/arm/arm/mpcore_timer.c ============================================================================== --- head/sys/arm/arm/mpcore_timer.c Wed Apr 2 17:34:17 2014 (r264048) +++ head/sys/arm/arm/mpcore_timer.c Wed Apr 2 18:32:27 2014 (r264049) @@ -173,6 +173,9 @@ arm_tmr_start(struct eventtimer *et, sbi uint32_t load, count; uint32_t ctrl; + tmr_prv_write_4(PRV_TIMER_CTRL, 0); + tmr_prv_write_4(PRV_TIMER_INTR, PRV_TIMER_INTR_EVENT); + ctrl = PRV_TIMER_CTRL_IRQ_ENABLE | PRV_TIMER_CTRL_TIMER_ENABLE; if (period != 0) { @@ -182,14 +185,14 @@ arm_tmr_start(struct eventtimer *et, sbi load = 0; if (first != 0) - count = ((uint32_t)et->et_frequency * first) >> 32; + count = (uint32_t)((et->et_frequency * first) >> 32); else count = load; tmr_prv_write_4(PRV_TIMER_LOAD, load); tmr_prv_write_4(PRV_TIMER_COUNT, count); - tmr_prv_write_4(PRV_TIMER_CTRL, ctrl); + return (0); }