From owner-svn-src-all@FreeBSD.ORG Wed Dec 17 03:48:35 2008 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 809FD1065673; Wed, 17 Dec 2008 03:48:35 +0000 (UTC) (envelope-from murray@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 6DAD68FC12; Wed, 17 Dec 2008 03:48:35 +0000 (UTC) (envelope-from murray@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id mBH3mZd5056499; Wed, 17 Dec 2008 03:48:35 GMT (envelope-from murray@svn.freebsd.org) Received: (from murray@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id mBH3mZ6m056498; Wed, 17 Dec 2008 03:48:35 GMT (envelope-from murray@svn.freebsd.org) Message-Id: <200812170348.mBH3mZ6m056498@svn.freebsd.org> From: Murray Stokely Date: Wed, 17 Dec 2008 03:48:35 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org X-SVN-Group: stable-7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r186205 - stable/7/release/doc/en_US.ISO8859-1/hardware X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Dec 2008 03:48:35 -0000 Author: murray Date: Wed Dec 17 03:48:35 2008 New Revision: 186205 URL: http://svn.freebsd.org/changeset/base/186205 Log: MFC: r186204 Update the list of Intel chips with EM64T for FreeBSD/amd64 and increase the known maximum memory configuration from 8gb to 32gb. Approved by: re (hrs) Modified: stable/7/release/doc/en_US.ISO8859-1/hardware/article.sgml Modified: stable/7/release/doc/en_US.ISO8859-1/hardware/article.sgml ============================================================================== --- stable/7/release/doc/en_US.ISO8859-1/hardware/article.sgml Wed Dec 17 03:24:55 2008 (r186204) +++ stable/7/release/doc/en_US.ISO8859-1/hardware/article.sgml Wed Dec 17 03:48:35 2008 (r186205) @@ -92,21 +92,40 @@ - &intel; 64-bit &xeon; (Nocona). - This processor is fabricated on 90nm process technology, and operates - with 2.80 to 3.60 GHz (FSB 800MHz) and &intel; E7520/E7525/E7320 chipsets. + All multi-core &intel; &xeon; processors except + Sossaman have EM64T support. - &intel; &pentium; 4 Processor supporting &intel; EM64T - (Prescott). - This is fabricated on 90nm process technology, - uses FC-LGA775 package, and operates with 3.20F/3.40F/3.60F GHz - and &intel; 925X Express chipsets. - The corresponding S-Spec numbers are SL7L9, SL7L8, SL7LA, SL7NZ, SL7PZ, - and SL7PX. Note that processors marked as 5xx numbers do not support - EM64T. + The single-core &intel; &xeon; + processors Nocona, Irwindale, + Potomac, and Cranford have + EM64T support. + + + All &intel; Core 2 (not Core Duo) and later + processors + + + + All &intel; &pentium; D processors + + + + &intel; &pentium; 4s and Celeron Ds using + the Cedar Mill core have EM64T + support. + + + + Some &intel; &pentium; 4s and Celeron Ds using + the Prescott core have EM64T support. See + the Intel + Processor Spec Finder for the definitive answer about + EM64T support in Intel processors. + + &intel; EM64T is an extended version of IA-32 (x86) and @@ -115,7 +134,7 @@ 64-bit extension technology or IA-32e. The largest tested - memory configuration to date is 8GB. SMP support has been + memory configuration to date is 32GB. SMP support has been recently completed and is reasonably robust. In many respects, &os;/&arch.amd64; is similar to &os;/&arch.i386;, in