From owner-svn-src-head@FreeBSD.ORG Tue Nov 16 22:44:58 2010 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id AA0C21065672; Tue, 16 Nov 2010 22:44:58 +0000 (UTC) (envelope-from jkim@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 97EC98FC13; Tue, 16 Nov 2010 22:44:58 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id oAGMiw95069800; Tue, 16 Nov 2010 22:44:58 GMT (envelope-from jkim@svn.freebsd.org) Received: (from jkim@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id oAGMiwnO069797; Tue, 16 Nov 2010 22:44:58 GMT (envelope-from jkim@svn.freebsd.org) Message-Id: <201011162244.oAGMiwnO069797@svn.freebsd.org> From: Jung-uk Kim Date: Tue, 16 Nov 2010 22:44:58 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r215414 - in head/sys: amd64/amd64 i386/i386 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Nov 2010 22:44:58 -0000 Author: jkim Date: Tue Nov 16 22:44:58 2010 New Revision: 215414 URL: http://svn.freebsd.org/changeset/base/215414 Log: Invalidate TLBs explicitly. r1.4 of sys/i386/i386/i686_mem.c removed this code but probably it only worked by chance because modifying CR4.PGE bit causes invlidation of entire TLBs. Since these are very rare events, this micro-optimization seems useless. Reviewed by: jhb Modified: head/sys/amd64/amd64/amd64_mem.c head/sys/i386/i386/i686_mem.c Modified: head/sys/amd64/amd64/amd64_mem.c ============================================================================== --- head/sys/amd64/amd64/amd64_mem.c Tue Nov 16 22:23:20 2010 (r215413) +++ head/sys/amd64/amd64/amd64_mem.c Tue Nov 16 22:44:58 2010 (r215414) @@ -321,6 +321,7 @@ amd64_mrstoreone(void *arg) /* Flushes caches and TLBs. */ wbinvd(); + invltlb(); /* Disable MTRRs (E = 0). */ wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRR_DEF_ENABLE); @@ -388,8 +389,9 @@ amd64_mrstoreone(void *arg) wrmsr(msr + 1, msrv); } - /* Flush caches, TLBs. */ + /* Flush caches and TLBs. */ wbinvd(); + invltlb(); /* Enable MTRRs. */ wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_DEF_ENABLE); Modified: head/sys/i386/i386/i686_mem.c ============================================================================== --- head/sys/i386/i386/i686_mem.c Tue Nov 16 22:23:20 2010 (r215413) +++ head/sys/i386/i386/i686_mem.c Tue Nov 16 22:44:58 2010 (r215414) @@ -315,6 +315,7 @@ i686_mrstoreone(void *arg) /* Flushes caches and TLBs. */ wbinvd(); + invltlb(); /* Disable MTRRs (E = 0). */ wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRR_DEF_ENABLE); @@ -382,8 +383,9 @@ i686_mrstoreone(void *arg) wrmsr(msr + 1, msrv); } - /* Flush caches, TLBs. */ + /* Flush caches and TLBs. */ wbinvd(); + invltlb(); /* Enable MTRRs. */ wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_DEF_ENABLE);