From owner-svn-src-head@freebsd.org Sun Mar 8 21:25:38 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 10AE9276B59; Sun, 8 Mar 2020 21:25:38 +0000 (UTC) (envelope-from emaste@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 48bDss4F5kz47K7; Sun, 8 Mar 2020 21:25:37 +0000 (UTC) (envelope-from emaste@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id F042C3AB; Sun, 8 Mar 2020 21:25:36 +0000 (UTC) (envelope-from emaste@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 028LPa4Z026495; Sun, 8 Mar 2020 21:25:36 GMT (envelope-from emaste@FreeBSD.org) Received: (from emaste@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 028LPa8e026494; Sun, 8 Mar 2020 21:25:36 GMT (envelope-from emaste@FreeBSD.org) Message-Id: <202003082125.028LPa8e026494@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: emaste set sender to emaste@FreeBSD.org using -f From: Ed Maste Date: Sun, 8 Mar 2020 21:25:36 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r358788 - head/share/man/man7 X-SVN-Group: head X-SVN-Commit-Author: emaste X-SVN-Commit-Paths: head/share/man/man7 X-SVN-Commit-Revision: 358788 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 08 Mar 2020 21:25:38 -0000 Author: emaste Date: Sun Mar 8 21:25:36 2020 New Revision: 358788 URL: https://svnweb.freebsd.org/changeset/base/358788 Log: arch.7: remove sparc64 references sparc64 was removed from the tree, so remove references here (except for the supported release table). Sponsored by: The FreeBSD Foundation Modified: head/share/man/man7/arch.7 Modified: head/share/man/man7/arch.7 ============================================================================== --- head/share/man/man7/arch.7 Sun Mar 8 21:21:47 2020 (r358787) +++ head/share/man/man7/arch.7 Sun Mar 8 21:25:36 2020 (r358788) @@ -26,7 +26,7 @@ .\" .\" $FreeBSD$ .\" -.Dd January 8, 2020 +.Dd March 8, 2020 .Dt ARCH 7 .Os .Sh NAME @@ -69,7 +69,6 @@ and should be avoided. .Pp On some architectures, e.g., -.Dv sparc64 , .Dv powerpc and AIM variants of .Dv powerpc64 , @@ -210,7 +209,6 @@ Machine-dependent type sizes: .It powerpc64 Ta 8 Ta 8 Ta 8 .It riscv64 Ta 8 Ta 16 Ta 8 .It riscv64sf Ta 8 Ta 16 Ta 8 -.It sparc64 Ta 8 Ta 16 Ta 8 .El .Pp .Sy time_t @@ -237,7 +235,6 @@ is 8 bytes on all supported architectures except i386. .It powerpc64 Ta big Ta unsigned .It riscv64 Ta little Ta signed .It riscv64sf Ta little Ta signed -.It sparc64 Ta big Ta signed .El .Ss Page Size .Bl -column -offset indent "Sy Architecture" "Sy Page Sizes" @@ -261,7 +258,6 @@ is 8 bytes on all supported architectures except i386. .It powerpc64 Ta 4K .It riscv64 Ta 4K .It riscv64sf Ta 4K -.It sparc64 Ta 8K .El .Ss Floating Point .Bl -column -offset indent "Sy Architecture" "Sy float, double" "Sy long double" @@ -285,7 +281,6 @@ is 8 bytes on all supported architectures except i386. .It powerpc64 Ta hard Ta hard, double precision .It riscv64 Ta hard Ta hard, double precision .It riscv64sf Ta soft Ta soft, double precision -.It sparc64 Ta hard Ta hard, quad precision .El .Ss Default Tool Chain .Fx uses a variety of tool chain components for the supported CPU @@ -321,7 +316,6 @@ This table shows the default tool chain for each archi .It powerpc64 Ta Clang Ta lld .It riscv64 Ta Clang Ta lld .It riscv64sf Ta Clang Ta lld -.It sparc64 Ta GCC(1) Ta GNU ld(1) .El .Pp (1) External toolchain provided by ports/packages. @@ -330,7 +324,7 @@ Note that GCC 4.2.1 is deprecated, and scheduled for r Any CPU architectures not migrated by then (to either base system Clang or external toolchain) may be removed from the tree after that date. -make universe will not build mips or sparc64 +make universe will not build mips architectures unless the xtoolchain binaries have been installed for the architecture. .Ss MACHINE_ARCH vs MACHINE_CPUARCH vs MACHINE @@ -353,7 +347,6 @@ or similar things like boot sequences. .It mips Ta mips Ta mips, mipsel, mips64, mips64el, mipshf, mipselhf, mips64elhf, mipsn32 .It powerpc Ta powerpc Ta powerpc, powerpcspe, powerpc64 .It riscv Ta riscv Ta riscv64, riscv64sf -.It sparc64 Ta sparc64 Ta sparc64 .El .Ss Predefined Macros The compiler provides a number of predefined macros. @@ -399,7 +392,6 @@ Architecture-specific macros: .It powerpc64 Ta Dv __powerpc__, Dv __powerpc64__ .It riscv64 Ta Dv __riscv, Dv __riscv_xlen == 64 .It riscv64sf Ta Dv __riscv, Dv __riscv_xlen == 64 -.It sparc64 Ta Dv __sparc64__ .El .Pp Compilers may define additional variants of architecture-specific macros.